Extended Data Table 1 Thickness of h-BN dielectrics and corresponding areal capacitances for the WTe2 devices

From: Ferroelectric switching of a two-dimensional metal

  1. We define the gate-induced density imbalance to be ne = (CtVt + CbVb)/e and E⊥ = (−CtVt + CbVb)/(2εh-BNε0), where the geometric areal capacitances are Ct = εhBNε0/dt and Cb = εhBNε0/db, εhBN ≈ 4 is the dielectric constant of h-BN, and dt and db are the thicknesses of the top and bottom h-BN flakes, respectively. All thicknesses were obtained from AFM images. In device B3, the WTe2 flake is directly under the top graphene (no top h-BN). In device F1, the thick WTe2 is directly on the bottom graphite (no bottom h-BN).
  2. *For device T1, there is no bottom graphite; instead, we used the metallic silicon substrate as the bottom gate, the areal capacitance then being Cb = ε0/(db/εhBN + dSiO2/εSiO2). We did not make a four-layer device so we do not know at exactly what thickness polarization switching ceases to be possible.
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