Extended Data Fig. 5: Comparison between the MTJ- and CMOS-based energy per random bit and cell area.
From: Integer factorization using stochastic magnetic tunnel junctions
a, An MTJ-based p-bit simulated with the stochastic LLG model (s-LLG, dotted box). b, A 32-bit LFSR. The look-up table (LUT) and the digital comparator of the CMOS p-bit are not included in the comparison. INV, inverter; DFF, D-type flip flop.
