Extended Data Fig. 7: Hysteresis signature in the bulk electronic compressibility of device H2.

a, b, Bottom capacitance C_b between the bottom gate and BLG as a function of the externally applied field, D_ext as the fast-scan axis, and gate-defined carrier density, n_ext as the slow-scan axis. The white arrows indicate the sweep direction of D_ext in each panel. Deviations of the capacitance from the geometric value reflect modulations in the electronic compressibility, ∂n/∂μ, from the total area of BLG overlapping the bottom gate. Data were collected by sweeping the displacement field at each fixed carrier density, as in Fig. 2h, i. Dark features indicate regions of incompressibility resulting from the opening of a gap in the BLG. The gapless point, a compressible state with high C_b, is achieved at a finite D_ext that depends on the sweep direction. c, Forward and backward traces from a and b at a fixed n_ext. d, Resistance traces at the same density showing resistance peaks corresponding to the incompressible features in c. e, Circuit schematic of the bottom gate capacitance measurement, including a two-stage cryogenic amplifier (enclosed in dashed box). Capacitance is measured by applying a small a.c. excitation voltage to the bottom gate, δV_BG, while also applying a nearly 180° out-of-phase signal, δV_ref, to a reference capacitor, C_ref to null the voltage at the bridge balance point, (B). Deviations in the balanced signal caused by variations in compressibility are amplified by two high electron-mobility transistors and measured at the drain of the second stage, δV_out. Carrier density n_ext and external field D_ext are controlled by top- and bottom-gate d.c. voltages V_TG and V_BG, in the same way as in the transport measurements.