Extended Data Fig. 12: Energy consumption, latency, and throughput measurement results.
From: A compute-in-memory chip based on resistive random-access memory
a, Measured energy consumption per operation during the MVM input stage (without 2-phase operation) and output stage, where one multiply–accumulate (MAC) counts as two operations. b, Energy consumption breakdown at various MVM input and output bit-precisions. Outputs are 2-bit higher than inputs during a MVM to account for additional precision requirements from partial-sum accumulation. c, Latency for performing one MVM with 256×256 weight matrix. d, Peak computational throughput (in giga-operations per second). e, Throughput-power efficiency (in tera-operations per watt).
