Extended Data Fig. 7: Setups for single transistor, amplifier, flow regulator, and level shifter measurements.

Relevant component details such as geometry and resistance values are provided in Extended Data Table 1. a, Pinout diagram of single transistor chip (NC: no connection) with punched ports coloured gray, and channel layers coloured magenta and teal. b, Fluidic setup for single transistor characteristic curves and transconductance curve measurements. Cross-terminated link indicates no connection. c, Pinout diagram of amplifier chip with punched ports coloured gray, and channel layers coloured magenta and teal. d, Fluidic setup for amplifier demonstration and distortion measurements. e, Fluidic setup for amplifier common-mode rejection measurements. f, Fluidic setup for amplifier Frequency response (Bode plot) measurements. g, Pinout diagram of flow regulator chip with punched ports coloured gray, and channel layers coloured magenta and teal. h, Fluidic setup for regulator demonstration and line regulation measurements. i, Fluidic setup for load regulation measurements. j, Pinout diagram of level shifter chip with punched ports coloured gray, and channel layers coloured magenta and teal. k, Fluidic setup for level shifter demonstration, shift amount, and gain measurements.