Extended Data Fig. 11: CMOS NAND with fixed Vin1.
From: Selenium-alloyed tellurium oxide for amorphous p-channel transistors
Plotting of the NAND output vs input Vin2 while Vin1 was kept at a VDD = 12 V.
Extended Data Fig. 11: CMOS NAND with fixed Vin1. | Nature
