Figure 3
From: Palladium gates for reproducible quantum dots in silicon
Measurements performed on Pd devices at 25 mK. Current versus voltage on the lead gate and the barrier gates at VSD = 1 mV in Device D (a) and Device E (c). In (a), Vb1 and Vb2 are linked by Vb2 = Vb1 + 300 mV. In (c), Vb2 = Vb1 − 250 mV, and the colour scale is the same as in (a). The arrows indicate deviations from the single quantum dot picture. (b) and (d) are bias spectroscopy plots along the dashed lines in (a) and (c), respectively.
