Figure 5
The basic components of the device driver. An array of 24 × 12 bits is sent to the 24 PWM via the SPI interface. Each of the PWM signals is pulled up by 1.8 kΩ resistor to make the output signal transistor-transistor-logic (TTL) compatible. Six four channel ADG5412 switches convert the TTL-PWM signals to effective rms voltages (0 to 6 V) for each of the 24 LC signals, by connecting to the 6 V, 10 kHz signal supplied by the waveform generator (WFG). The individual LC electrode is connected to the LC signals, and a 10 kΩ pull down resistor. The user interface is included in the insert.
