Figure 1

(a) 3D schematic of the proposed structures. (b,c) Simulation region for (b) NWs and (c) NPs structures. (d) Simulation region for calculating Mie efficiency for doped Silicon NPs in a Silicon environment.

(a) 3D schematic of the proposed structures. (b,c) Simulation region for (b) NWs and (c) NPs structures. (d) Simulation region for calculating Mie efficiency for doped Silicon NPs in a Silicon environment.