Figure 2
Experimental realization of the proposed neuristor. (a) SEM image of the device. Two layers of electrodes, electrically isolated by an Al2O3 spacer, are visible. Bottom layer consist of two Ti/Au electrodes, running vertically in the image. A small gap (~50 nm) is left in between. The upper electrode is kept at VDC bias. The top electrode layer is a Ti/Au nanowire, running horizontally in the image. Input current pulses (red) are sent through that heating electrode, while the neuristor output (blue) is collected though the lower bottom electrode. (b) Current through a VO2 gap vs time, when a 1 μs voltage pulse is applied. T = 315 K. Two different pulse amplitudes are shown, 0.87 V (black) and 0.92 V (grey). (c) Threshold voltage vs temperature in a gap, when two different DC currents are applied to the heater: 0 mA (black) and 12.5 mA (grey). The green dot is an example of the VDC and temperature conditions for the device to behave as a neuristor. (d) Current vs time. Left axis (red curve) shows the input current through the heater. Right axis (blue curve) shows the output through the gap. Conditions were VDC = 0.85 VTh and T = 325 K. e Current vs time, with a load resistor in series with the gap. Left axis (red) shows the input current pulse. Right axis (blue) shows the output through the gap. RLoad = 10 kΩ, VDC = 0.88 VTh and T = 325 K. Inset: schematic circuit showing RLoad connected in series with the gap.
