Figure 8
From: Combinatorial logic devices based on a multi-path active ring circuit
(A) Schematics of the 3 × 3 matrix with a given set of phase shifts per delay line. The set is the same as in Fig. 7A. There is one input port # 1 and all three output ports connected to the matrix. The external phase is fixed to \(\Psi =1.2\uppi\) for all three outputs. The task is to find the shortest input–output path for the given phase. (B) Results of numerical modeling showing the number of paths as a function of amplification level. There may be four, three, one, and no paths. (C–E) Results of numerical modeling illustrating power sensor output (i.e. green circles) for the different levels of amplification. The shortest path appears for amplification \({4A}_{0}\) as shown (E).
