Figure 3
From: A processing-in-pixel-in-memory paradigm for resource-constrained TinyML applications
(a) Pixel output voltage as a function of weight (transistor width) and input activation (normalized photo-diode current) simulated on GlobalFoundries 22 nm FD-SOI node. As expected pixel output increases both as a function of weights and input activation. (b) A scatter plot comparing pixel output voltage to ideal multiplication value of Weights\(\times\)Input activation (Normalized \(W\times I\)). (c) Analog convolution output voltage versus ideal normalized convolution value when 75 pixels are activated simultaneously.
