Figure 3 | Scientific Reports

Figure 3

From: Formal synthesis of non-fragile state-feedback digital controllers considering performance requirements for step response

Figure 3

We illustrate the traditional CEGIS’ block diagram9, where the synthesizer provides candidate solutions, while the verifier checks whether these solutions meet the specification. We implement a learning algorithm in the synthesizer, responsible for refining candidate solutions based on feedback (counterexamples) provided by the verifier.

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