Table 2 Comparison of the hardware demonstrations shown in this work with previous hardware demonstrations of QAOA on gate-based devices.

From: Constrained quantum optimization for extractive summarization on a trapped-ion quantum computer

 

References

Year

Hardware

Connectivity

N

p

2q-gate depth

Error Mit.

H.W.C.

Unconstrained

48

2017

Superconducting

Nearest neighbor

19

1

6

No

49

2020

Superconducting

Nearest neighbor

7

6

42

No

13

2021

Superconducting

Nearest neighbor

23

5

\(40^1\)

Yes

13

2021

Superconducting

Nearest neighbor

17

3

153

Yes

Hard constraint

50

2022

Superconducting

Nearest neighbor

3

5

No

2

50

2022

Trapped ion

All-to-all

3

4

No

2

This work

2022

Trapped ion

All-to-all

14

1

114

No

8

This work

2022

Trapped ion

All-to-all

20

1

\({159}\)

No

14

  1. We only report experiments that outperformed random guess and either are similar in scale to ours in terms of circuit size or utilized hard constraints. All hard constraints are on the Hamming weight (H.W.C. in the table). The two-qubit-gate depth is missing from references where the depth was not reported and could not be estimated. We also report the topology of two-qubit interactions available o the hardware (“Connectivity” in the table) and whether error-mitigation techniques were applied (“Error Mit.”).
  2. Depth estimated from the circuit description in the paper.