Table 1 Verification structures.

Substrate

ε_r = 3.5

ε_r = 3.5

ε_r = 3.5

h = 0.76 mm

h = 0.76 mm

h = 0.76 mm

Design parameters

x = [l₁ l₂ l₃ w₁ w₂ w₃]^T

x = [l₁ l₂ l₃ d w w₁]^T

x = [l_1.1 l_1.2 w_1.1 w_1.2 w_1.0 l_2.1 l_2.2 w_2.1 w_2.2 w_2.0]^T

Other parameters

l₀ = 30, w₀ = 3, s₀ = 0.15, o = 5

d₁ = d +|w − w₁|, d = 1.0, w₀ = 1.7, and l₀ = 15

w_in = 1.7, w_out = 0.4

Design specifications

Minimize reflection coefficient |S₁₁| at two operating frequencies, 2.5 GHz and 4.8 GHz

Ensure 3 dB power split, |S₃₁| −|S₂₁|= 3 dB, at the operating frequency f₀ = 1 GHz, and minimize max{|S₁₁|,|S₄₁|} at f₀

Minimize the maximum in-band reflection coefficient |S₁₁| within the range 1.8 GHz to 4.0 GHz

LPW

25

15

30

Simulation time^#

60 s

160 s

120 s

Parameter space

l = [15 5 5 0.2 1.5 0.5]^T

l = [1.0 5.0 10.0 0.2 0.5 0.2]^T

l = [2.0 0.1 0.5 0.1 0.2 2.0 0.1 0.1 0.1 0.2]^T

u = [50 15 30 0.6 5.0 5.0]^T

u = [6.0 15.0 25.0 1.2 1.5 1.2]^T

u = [5.5 0.5 1.1 0.8 1.1 4.5 1.0 0.6 0.6 1.3]^T