Table 4 Circuit level performance metrics.

From: Implementation and performance analysis of QPSK system using pocket double gate asymmetric JLTFET for satellite communications

Logic gates

Propagation delay

Power consumption (pW)

Power dissipation

Inverter

8.70 ps

11.54

5.16 aW

NAND gate

7.63 ps

14.03

8.72 aW

X-OR gate

1.07 ps

9.38

1.37 aW

D Flip-Flop

9.14 ps

23.44

17.41 aW

PRBS generator

46.72 ps

67.32

68.62 fW

Odd/Even Stream generator

ES:58.21 ps

OS:76.38 ps

43.25

85.43 fW

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