Figure 1
From: Enhancing on/off ratio of a dielectric-loaded plasmonic logic gate with an amplitude modulator
(a) The schematic diagram of plasmonic XNOR gate. Input A and input B contain a phase modulator. The Ref channel has an amplitude modulator. (b,c) The cases of zero output when (A, Ref, B) = (0, 1, 1) and (1, 1, 0). (d) The case of unitary output when (A, Ref, B) = (1, 1, 1).
