Figure 4
Manipulation of LCDs between micro-ITO electrodes. (a) Schematic top view of the microcapacitive device. Designed striped ITO electrodes perpendicularly on upper and lower glass substrates. (b) Cross-sectional view (β–β′) of the microcapacitive device. The striped patterns of ITO electrodes on upper and lower glass substrates are parallel to the y- and x-axes, respectively. We set the cell thickness to 20 µm. (c) Morphology of LCDs within the microcapacitive device, POM images with voltages of 0, 5, 10, and 15 V. FT images were obtained by transferring POM images. (d) POM image of 15 × 15 LCD array with a voltage of 30 V. (e) POM image of LCD array after removing the voltage.
