Table 10 Datawidth analysis.

From: Radix-4 CORDIC algorithm based low-latency and hardware efficient VLSI architecture for Nth root and Nth power computations

Task

\(P^N\)

\(P^{\dfrac{1}{N}}\)

Operation

Variable

Data format

Word length

Operation

Variable

Data format

Word length

Logarithm

Normalizer

P

FXP(8,27)

35

Normalizer

P

FXP(21,27)

48

R4HV

p

FXP(4,31)

35

R4HV

p

FXP(4,44)

48

Adder

q, \(\log _24p\)

FXP(4,27)

31

Adder

q, \(\log _4p\)

FXP(5,27)

32

Division / Multiplication

Multiplier

\(\log _4(P)\), N

FXP(5,27)

32

R4LV

\(\log _4(P)\), N

FXP(11,27)

38

Normalizer

\(\log _{4}(P){N}\)

FXP(3,27)

30

Normalizer

\(\dfrac{\log _4(P)}{N}\)

FXP(4,27)

31

Exponential

R4HR

q, \(\log _{4}(P){N}\)

FXP(3,27)

30

R4HR

q, \(\dfrac{\log _{4}(P)}{N}\)

FXP(3,27)

30

Adder

\(\cosh (.)\), \(\sinh (.)\)

FXP(3,27)

30

Adder

\(\cosh (.)\), \(\sinh (.)\)

FXP(3,27)

30