Table 3 Inputs of the multiplexer implementation for basic hybrid gates.
Mux input | \(I_0\) | \(I_1\) |
|---|---|---|
XOR | \(I_c\) | \(\overline{I_c}\) |
XNOR | \(\overline{I_c}\) | \(I_c\) |
AND | Enc(0) | \(I_c\) |
OR | \(I_c\) | Enc(1) |
NAND | Enc(1) | \(\overline{I_c}\) |
NOR | \(\overline{I_c}\) | Enc(0) |