Table 1 Summary of benchmark results.
From: Highly-integrable analogue reservoir circuits based on a simple cycle architecture
| Â | MC of degree | NARMA10 prediction | ||||
|---|---|---|---|---|---|---|
1 | 2 | 3 | 4 | RMSE | NRMSE | |
Hardware prototype | 45.12 | 30.62 | 5.46 | 0.57 | 0.0351 | 0.0861 |
Simulation | 57.92 | 24.65 | 0.00 | 0.00 | 0.0397 | 0.0973 |