Table 5 Comparing the robustness of the proposed ASDB gates against possible defects with previous works10,12,13,19.

From: Design and simulation of a low-energy atomic silicon quantum-dot circuit with potential in internet of things applications

ASDB gates

Proposed design

Design in10

Design in19

Design in13

Design in12

DB omission (%)

DB deposition (%)

DB omission (%)

DB deposition (%)

DB omission (%)

DB deposition (%)

DB omission (%)

DB deposition (%)

DB omission (%)

DB deposition (%)

AND

48

56

22

42

21

35

22

33

28

42

NAND

54

65

44

44

35

28

33

33

55

55

OR

44

41

22

42

22

28

22

22

28

42

NOR

67

60

33

55

NR

NR

NR

NR

66

66

XOR

68

63

66

66

55

55

66

42

77

77

XNOR

54

54

55

66

NR

NR

NR

NR

NR

NR

Average

56

55

40

53

22

24

36

33

51

56

  1. NR = Not Reported.