Table 6 Evaluating the stability of the proposed gates with varying temperature (k) ranges.

From: Design and simulation of a low-energy atomic silicon quantum-dot circuit with potential in internet of things applications

ASDB Gates

Temperature (k) ranges A

Occurrence (%)

Temperature(k) ranges B

Occurrence (%)

Temperature(k) ranges C

Occurrence (%)

Temperature(k) ranges D

Occurrence (%)

Temperature(k) ranges E

Occurrence (%)

AND

2

500

97

500

600

48

600

700

34

700

800

13

800

1000

2

NAND

2

500

89

500

600

43

600

700

34

700

800

9

800

1000

0.36

OR

2

500

99

500

600

46

600

700

28

700

800

9

800

1000

1

NOR

2

500

82

500

600

32

600

700

23

700

800

9

800

1000

1

XOR

2

500

95

500

600

38

600

700

19

700

800

8

800

1000

4

XNOR

2

500

97

500

600

46

600

700

16

700

800

6

800

1000

7