Fig. 5

Energy band diagram schematics at the onset of FS (V _GS = −100 V) and RS (V _GS = +100 V) for 300 and 400 K showing key mechanisms responsible for hysteresis. a Temperature dependent trapping (1) in FS and de-trapping (2) in RS of intrinsic traps in MoS₂ channel. (i) Trapped (de-trapped) charges for reverse (forward) sweep at 300 K result in increase (decrease) in V _TH and hence, clockwise hysteresis. (ii) Increase in temperature enhances the de-trapping in RS and trapping in FS. Further, increase in temperature (~400 K) results in equal number of trapped charges in both FS and RS resulting in hysteresis collapse (ΔV _TH = 0 V). b Temperature dependent tunneling into oxide from p⁺ Si gate (3) and tunneling from oxide into p⁺ Si gate (4). (i) Lack of tunneling at 300 K indicates mechanisms 3–4 are insignificant and there is no hysteresis due to oxide traps. (ii) At high temperatures (~400 K) electrons will tunnel into (out of) gate oxide for large negative (positive) bias which results in increase (decrease) in V _TH for forward (reverse) sweep and hence, anti-clockwise hysteresis