Fig. 5
From: Large-signal model of 2DFETs: compact modeling of terminal charges and intrinsic capacitances

Gate and drain charges versus a overdrive gate bias (at Vds = 1 V) and b drain bias (at Vgs – Vg0 = 3.4 V). Intrinsic capacitances versus c overdrive gate bias (at Vds = 1 V) and d drain bias (at Vgs – Vg0 = 3.4 V). Shift of the Fermi level with respect to the conduction band edge, namely, the chemical potential at the drain (Vcd) and source (Vcs) sides versus e overdrive gate bias (at Vds = 1 V) and f drain bias (at Vgs – Vg0 = 3.4 V).