Fig. 1: Rationale and principle. | npj 2D Materials and Applications

Fig. 1: Rationale and principle.

From: Gate energy efficiency and negative capacitance in ferroelectric 2D/2D TFET from cryogenic to high temperatures

Fig. 1: Rationale and principle.The alternative text for this image may have been generated using AI.

a Schematic of the gate structure (left). The hysteretic behavior leads to an energy loss (right bottom) while the stable NC region without hysteresis improves the energy behavior of the gate stack (right top). b Qualitative comparison between quasi-DC and pulsed measurement techniques. c Temperature-dependent P − E loops. d, e The evolution trend of the NC effect and the potential energy U with increasing temperature.

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