Fig. 8: I–V Curve and number of mismatch bits characteristics for 2FeFETs TCAM operation.

a I–V hysteresis graph with Vth shifted to the right, b The variation of the ML node with an increase in number of mismatch bits (64 × 64 size).

a I–V hysteresis graph with Vth shifted to the right, b The variation of the ML node with an increase in number of mismatch bits (64 × 64 size).