Fig. 4: Validation of our proposed extraction on low-mobility and high-EOT transistors. | npj 2D Materials and Applications

Fig. 4: Validation of our proposed extraction on low-mobility and high-EOT transistors.

From: Mobility and threshold voltage extraction in transistors with gate-voltage-dependent contact resistance

Fig. 4

Id vs. Vov for families of devices with Lch = 200, 400, …, 1000 nm and Schottky barrier height ϕB = 0.45 eV with a EOT = 10 nm and mobility μ = 5 cm2 V−1 s−1 and b EOT = 100 nm and μ = 50 cm2 V−1 s−1. The solid gray lines mark the approximate Id turn-on for each family of devices, and the x-axes are the same as in c, d and e, f. c The extracted mobility μ with our method and the linear extrapolation (LE), Y-function (Y), and TLM approaches for device families with EOT = 10 nm and mobility μ = 5 cm2 V−1 s−1 and d EOT = 100 nm and μ = 50 cm2 V−1 s−1 plotted vs. Vov/EOT. The horizontal dashed line marks the true μ. e The threshold voltage VT extracted with each method for devices with EOT = 10 nm and μ = 5 cm2 V−1 s−1 and f EOT = 100 nm and μ = 50 cm2 V−1 s−1. Horizontal dashed lines mark the true channel VT.

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