Extended Data Fig. 3: Extracted charge leakage as VHOLD is varied, after removal of charge noise.
From: A cryogenic CMOS chip for generating control signals for multiple qubits
a-g, Traces from which charge leakage is extracted in Fig. 3c as VHOLD is varied, following the removal of charge noise. Each trace is fit with a line, from which the leakage rate is extracted.
