Extended Data Fig. 5: Impact of the substrate choice and the gate oxide to channel interface on the hysteresis.
From: Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning
The impact of the variation of the substrate from flexible polyimide to SiO2 grown on Si, to quartz wafers is studied. For the devices on quartz in one batch a single layer of hBN was used as an interlayer between graphene and Al2O3, see the overview in (a). In (b) the hysteresis in the ID-VG on various substrates is compared. In (c) the curves are shifted by their respective Dirac point (ID − (VG − VDirac)) to allow for a better comparison of the overdrive current, the currents at a certain overdrive voltage above the Dirac point. Three measurements of every device type are shown. In (d) the currents at fixed overdrive voltages and hysteresis widths are compared for three measurements on every device type. In (e) the dependence of the hysteresis width on the sweep time for the different substrates is shown. Fig. (f) shows the impact of the seed layer for the growth of the Al2O3 top gate insulator. As the quality of the seed layer varies substantially across the wafer, measurements were repeated for different devices at different locations across the wafer, represented by A, B, C and D. In (g) the hysteresis widths on the GFETs with seed layer are compared to a GFET without seed layer.
