Extended Data Fig. 9: BTI for a reduced high gate bias level of 5V.
From: Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning
In (a) the fast sweep ID(VG) curves after negative bias at -5V for increasingly long charging times are shown on Type 1 devices. The corresponding recovery traces can be seen in (b) for Type 1 and in (c) for Type 2. In an analog way, in (d) the fast sweep ID-VG curves after positive bias of 5 V are shown. For Type 1 devices the degradation is barely recoverable (e). On Type 2 FETs the degradation is mostly recoverable also for long charging times, see (f).
