Fig. 4: High-performance 8-bit AM and 8-bit DSCC.
From: A computing-in-memory macro based on three-dimensional resistive random-access memory
a, Structure of 1 MSPS 8-bit DSCC. The DSCC can directly sample and convert the analogue current to a digital signal. The structure dominated by complementary current mirrors makes the power of the DSCC highly dependent on the input current. These features are suitable for the current result of the VMM operation of CNN with sparse weights in the RRAM. b, Schematic of a 4-bit AM group with a gate precharge switch follower 4-bit AM group used for the 8bIN–9bW configuration. The input currents (IShaped0–IShaped3) are multiplied by inputs IN0–IN7 and the output results IOUTLL, IOUTLH, IOUTHL and IOUTHH are sent to the DSCC. Here N is the normalized width of the CMOS transistor. c, Simulated waveform of the output gate voltage of the AM and the structure of the gate precharge switch follower. The added gate precharge switch follower reduces the TAC by 54%.
