Extended Data Fig. 6: Power consumption of the NOR logic gate. | Nature Electronics

Extended Data Fig. 6: Power consumption of the NOR logic gate.

From: Reconfigurable logic-in-memory architectures based on a two-dimensional van der Waals heterostructure device

Extended Data Fig. 6: Power consumption of the NOR logic gate.The alternative text for this image may have been generated using AI.

Power consumption of the NOR logic gate. (a) Output waveforms (b) current and (c) power consumption of NOR logic gate with read voltage of 1 V. (d) Output waveforms (e) current and (f) power consumption with read voltage of 100 mV. (g) Output waveforms (h) current and (i) power consumption with read voltage of 10 mV.

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