A three-dimensional dynamic random-access memory (DRAM) architecture that uses oxide-semiconductor channel transistors offers a route to high-density, low-power memory.
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Song, T., Khan, A.I. 3D DRAM with stacked oxide-semiconductor channel transistors. Nat Electron 8, 1132–1133 (2025). https://doi.org/10.1038/s41928-025-01521-z
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DOI: https://doi.org/10.1038/s41928-025-01521-z
