A scalable patterning method can create atomically sharp two-dimensional metal–semiconductor junctions, providing functional electrical contacts for logic-in-memory computing.
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Chang, WH. Scalable heterostructure contacts for power-efficient logic-in-memory. Nat Electron (2026). https://doi.org/10.1038/s41928-026-01633-0
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DOI: https://doi.org/10.1038/s41928-026-01633-0
