Fig. 1: Electrostatic model of a geometric diode.

a Upper: geometric parameter definition, outer wire diameter (D), constriction diameter (d), angle (θ), and constriction angle (φ). Lower: device geometry and donor distribution. D = 100 nm, d = 10 nm, θ = 5.29°, φ = 46°. The background is set to vacuum. Scale bar: 100 nm. b Inset: initially simulated I-V curve of silicon nanowire diode without surface states. Main: simulated I-V curve with a surface state density of 2.5 × 10¹² cm⁻². c The barrier heights along the geometric diode axis with the various voltage. (d–f) The band diagrams with the applied bias voltage of −1 V (d), 0 V (e), 1 V (f). The dashed lines represent the quasi-Fermi level of electrons in nonthermal equilibrium.