Fig. 4: The hardware implementation of in-memory search. | npj Unconventional Computing

Fig. 4: The hardware implementation of in-memory search.

From: In-memory search with learning to hash based on resistive memory for recommendation acceleration

Fig. 4

a RRAM-based CAM crossbar array. Each row stores the hash code of an individual item. b The truth table of a single CAM cell. c Schematic of SA, which is used to sense the voltage of the ML and compare it to a reference voltage. This comparison generates a digital output by SA, representing a match or a mismatch result. d The transient simulation of match and 1-bit mismatch. The search operation can be executed promptly. e The ML voltage increases with the number of mismatched bits, which is a result of different voltage division patterns. f The overlap rate with varying code length.

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