Fig. 2: An 8 × 8 synaptic array is illustrated with peripheral circuitry. | npj Unconventional Computing

Fig. 2: An 8 × 8 synaptic array is illustrated with peripheral circuitry.

From: Leveraging stochasticity in memristive synapses for efficient and reliable neuromorphic systems

Fig. 2

a Digital to Analog Circuit (DAC) is utilized to provide SET and READ voltage to the synapse. A Winner-Take-All (WTA) circuit is used to determine the maximum current contained columns from all active columns. A current-controlled synaptic circuit is presented at the right of the synaptic array. Three thick oxide transistors and a HfO2 based memristor are utilized to construct the synapse. b Shows the configuration for a neuroprocessor. Peripheral circuits control the gate of the synapse and read currents are sent to the LIF neuron.

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