Fig. 3: Cadence Spectre simulation is performed with 65 nm CMOS 10LPE process from IBM.
From: Leveraging stochasticity in memristive synapses for efficient and reliable neuromorphic systems
A Verilog-A model is used to simulate the memristor devices. Initially, the memristor of the synapse is unformed. The initial condition shows the synapse is in a standby condition, where all the signals are disabled. Then a one-time form operation is applied to the synapse. Later a RESET operation is applied to do the following SET operation. Finally, a READ operation is applied to sense the READ current of the synapse with a neuron or a WTA circuitry.
