Fig. 1: From von Neumann to in-memory computing. | npj Unconventional Computing

Fig. 1: From von Neumann to in-memory computing.

From: Achieving high precision in analog in-memory computing systems

Fig. 1

a Prototypical von Neumann architecture, where memory and processing units are physically separated and interconnected by a data bus. b IMC core, where computation happens directly within the embedded nonvolatile memory array. c IMC processor, composed of several IMC cores interconnected by a dedicated Network-On-Chip. d Open-loop IMC-based MVM circuit. e Closed-loop IMC-based IMVM circuit.

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