Fig. 5: Error correction code system. | npj Unconventional Computing

Fig. 5: Error correction code system.

From: Achieving high precision in analog in-memory computing systems

Fig. 5

a Concept scheme of an ECC system, where an encoder generates EC bits which are appended to the to-be-protected payload to form a codeword. Inaccuracies in the target operation result in a corrupted codeword, which is forwarded to a decoder exploiting the redundancy carried by EC bits to detect and correct errors, yielding the accurate computation output. b Encoder and (c) decoder schemes for AIMC, including memory-oriented Hamming codes for bit-level protection, and computing-oriented approaches, namely arithmetic ABN codes, MAC-ECC, and analog ECC, for protection of MVM outputs.

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