Figure 4
From: Current-limiting challenges for all-spin logic devices
Breakdown current density JBR of graphene and copper.
(a) The breakdown current density vs resistivity for 32 nm × 80 nm (W × L) graphene channel on 90 nm thickness SiO2. Thermal conductivity of graphene and SiO2 are kG = 100 W·m−1·K−1 and kox = 1.4 W m−1·K−1, respectively. Graphene-oxide interface thermal resistance Rcox = 10−8 m2 K W−1. (b) Calculated dependence of JBR on oxide thickness tox and graphene channel width W based on Eqs. (3 and 4). The inset shows that percentage of contribution to total thermal resistance (g-1) from the graphene-oxide interface and substrate, as a function of graphene channel width at tox = 90 nm. Parameters used are same as above. (c) Calculated dependence of JBR as a function of channel width. L = 100 nm and the other parameters are same as Table 1. The inset shows the resistivity of copper will dramatically increase for sub-100 nm wide based on Eq. (11), resulting in the decrease of JBR, Cu based on Eq. (5). (d) Calculated dependence of JBR as a function of channel length.
