A key component of quantum error correction is the decoding algorithm, which needs to be accurate but also with a computational overhead that doesn’t lead to backlogs and allows fast logical clock rates. Here, the authors show an FPGA-driven decoder featuring a coarse-grained parallel architecture and on-the-fly error model updates, allowing both high accuracy and real-time operation.
- Abbas B. Ziad
- Ankit Zalawadiya
- Mark L. Turner
