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Showing 1–7 of 7 results
Advanced filters: Author: Michel Houssa Clear advanced filters
  • Ordered corundum oxides offer promising alternatives to traditional perovskites in functional oxide thin films. Here, the authors utilize layer-by-layer growth to fabricate CrVO3 superlattice thin films, achieving atomic-scale precision and stabilizing the ilmenite phase, potentially expanding the range of customizable rhombohedral oxides with unique properties.

    • Claudio Bellani
    • Simon Mellaerts
    • Jin Won Seo
    ResearchOpen Access
    Communications Materials
    P: 1-8
  • The current state-of-the-art and possible future developments on two-dimensional silicene, germanene, and stanene sheets (called 2D-Xenes), and their ligand-functionalized derivatives (Xanes), are discussed.

    • Alessandro Molle
    • Joshua Goldberger
    • Deji Akinwande
    Reviews
    Nature Materials
    Volume: 16, P: 163-169
  • Silicene is the silicon counterpart of graphene, that is, it consists of a single layer of Si atoms arranged in a hexagonal network. This new two-dimensional material, first predicted by theory, has been recently grown on different metallic surfaces.1, 2, 3 An obvious advantage of silicene (over graphene) for nanoelectronic applications is its better compatibility and expected integration with the existing Si nanotechnology platform. A new breakthrough on this material has been recently reported by Tao et al.,4 who have successfully fabricated the first silicene-based field effect transistors (FETs) operating at room temperature. Their success relies on the development of a layer transfer process, called ‘silicene-encapsulated delamination with native electrodes’ (SEDNE). This innovative process includes the following key steps: (1) epitaxial growth of silicene on Ag(111) thin films grown on mica substrates; (2) Al2O3 in situ encapsulation of the silicene layer, followed by its delamination transfer on a p++Si/SiO2 substrate; and (3) subsequent Ag source/drain contact formation by e-beam lithography. A resulting silicene-based FET, with the p++Si substrate used as a back-gate contact, is shown in Figure 1a.

    • Michel Houssa
    Research HighlightsOpen Access
    NPG Asia Materials
    Volume: 7, P: e191