Abstract
We propose a network architecture for electronic skin with an extensive sensor array—crucial for enabling robots to perceive their environment and interact effectively with humans. Fault tolerance is essential for electronic skins on robot exteriors. Although self-healing electronic skins targeting minor damages are studied using material-based approaches, substantial damages such as severe cuts necessitate re-establishing communication pathways, traditionally performed with high-functionality microprocessor sensor nodes. However, this method is costly, increases latency, and boosts power usage, limiting scalability for large, nuanced sensation-mimicking sensor arrays. Our proposed system features sensor nodes consisting of only a few dozen logic circuits, enabling them to autonomously reconstruct reading pathways. These nodes can adapt to topological changes within the sensor network caused by disconnections and reconnections. Testing confirms rapid reading times of only a few microseconds and power consumption of 1.88 μW/node at a 1 kHz sampling rate. This advancement significantly boosts robots’ collaborative potential with humans.
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Introduction
For robots to comprehend their surroundings and collaborate effectively with humans1,2 and to physically interact with them3,4,5,6, the utilization of electronic skin (e-Skin) equipped with extensive sensor arrays is essential. These arrays help the robot discern the environment and gauge the state and intentions of human counterparts. Achieving this requires scalable sensor networks that can densely cover large areas and rapidly process data. Such networks ideally expand to thousands of nodes, with response times in the order of milliseconds, comparable to the human hand which contains approximately 17,000 mechanoreceptors7. The control cycles of robots rely on sensor readout times, necessitating response times ranging from several to tens of milliseconds8. Recent efforts are directed toward scalable and rapid sensor networks, particularly those emulating neural functions9,10,11,12.
However, in the practical application of e-Skin, resilience against faults remains a significant challenge. Externally mounted e-Skins are prone to damage from external forces, impacts, or degradation due to repeated bending. Current research is advancing in self-healable materials for wiring and structural elements13, such as liquid metal14, iontronic materials15, and nanofiber–polymer composites16. These technologies, however, primarily address minor damages. Significant damages might necessitate alternative functional recovery methods, such as changes in communication routing. For instance, in matrix-type sensor arrays17,18,19, wiring damage can prevent the readout of downstream sensors. Drawing inspiration from neuroplasticity in biological systems20,21, similar functionality is essential for e-Skins. Investigation of serial sensor networks demonstrates resilience against limited cuts through zigzag configurations9,22 Compared with matrix-type sensors, this design offers more locations that are resistant to disconnection, which is advantageous. Nevertheless, ideal fault modes may not always occur in real-world applications. Dynamic re-routing protocols that are robust, durable, and capable of high-speed operation (50 ms, with 204 nodes) have been proposed23,24. In addition, technology has been proposed where each node autonomously and distributively routes packet transmission paths25,26. Derived from advancements in internet technologies such as link-state routing (e.g., OSPF27) and distance-vector routing (e.g., DSDV28, SGF29), these methods assume that each node possesses substantial processing power and memory. Consequently, this increases cost, power consumption, and size per node. Therefore, scaling these technologies to sensor networks comprising thousands of nodes presents a significant challenge. A network architecture with minimal circuitry capable of dynamic rerouting needs to be developed, while not necessitating high computational demands, to attain resilience against extensive damage. Additionally, the necessity for this rerouting functionality arises from another perspective. The considerable expense associated with e-Skin, attributed to integrating numerous sensors, is expected to impede future advancements30. Furthermore, the design of the robot system and the types of sensors employed may necessitate custom shapes and sensor layouts, which are often three-dimensional. Resorting to specialized production lines could constrain the benefits of mass production, thereby potentially exacerbating cost increments. Such factors present a substantial obstacle to the broad-scale adoption of robots equipped with densely packed e-Skins. Although research aims to increase the adaptability of e-Skins with stretchable materials31,32, limitations persist. A promising solution involves e-Skins embedded within sheet-shaped sensor networks that can be freely cut or combined, allowing for mass production and cost reduction. This necessitates a network architecture that can dynamically re-route with minimal circuitry.
A review of network architectures, as outlined in Supplementary Table 1, shows their flexibility, re-routing capabilities, and robustness. Several existing designs require large processing power, limiting scalability and increasing costs. Considering these aspects, this study presents an architecture for reroutable sensor networks based on serial configurations. This architecture allows for the construction of serial, single-stroke readout paths adaptable to any network shape, ensuring all sensors remain readable provided that one pathway remains intact (illustrated in Fig. 1). Complex shapes, such as hand and its palm, sensor sheets can be formed by assembling or cutting e-Skin sheets. The sensors in this study were constructed with merely tens of logic circuits, facilitating high-speed operation, low power consumption, and miniaturization without need processors. Nodes operate autonomously using local information. Our prototype demonstrated readout times in the order of microseconds and power consumption of 1.88 µW/node at a 1 kHz sampling rate. Re-routing time is proportional to the number of nodes multiplied by the sampling rate, essentially unrestricted by node count. In addition, demonstrations included adapting to three-dimensional assembly by combining multiple planar sheets and making cuts using scissors. To our knowledge, this represents the smallest circuit scale for an autonomous, distributed, self-re-routing sensor network.
Results
Principle of proposed sensor network
The sensor network proposed in this study is based on a circuit methodology previously described, which allows for sequential signal propagation in a serial format12. The operational principles of this methodology are outlined below. The basic design of the sensor node is illustrated in Fig. 1. As shown in Fig. 2a, each node is serially interconnected in a chain-like formation. When a node receives a falling edge input at the trigger input port \({T}_{i}\), it generates a pulse signal embedded with sensor output information. This signal, along with the trigger, is subsequently transmitted to the next node. This sequential process enables the reading of output data from all sensors connected in series. Figure 2b presents the circuit design for a sensor node. For sensors that produce a change in resistance, capacitance, or other forms of impedance (represented as \({S}_{i}\) in the figure), the circuit includes a mechanism that generates a delay proportional to the sensor output. This delay circuit creates a pulse signal whose width correlates with the sensor output. As depicted in the upper section of Fig. 2c, the output \({D}_{1}\) from the first node emits a pulse of width \({\tau }_{i}\), indicative of the sensor data. The subsequent node’s output \({D}_{2}\) produces a waveform combining its own pulse with that of the previous node (middle section of Fig. 2c). Ultimately, the N-th output provides a sequence of concatenated pulses, each representing the output data of individual sensors (lower section of Fig. 2c). The simplicity of the sensor nodes, comprising only a few logic circuits, contributes to the network’s high-speed and low-power characteristics. Furthermore, as the data signal wiring is required only for the segment connecting one node to the next, no reduction in speed is needed due to increased parasitic elements as the number of nodes escalates. This design effectively imposes no theoretical limit on the number of nodes in the network.
a The overall structure of the sensor network, b the circuit diagram of a sensor node, and c the waveform output at each node. \({D}_{i}\) represents the sensor data signal of the i-th sensor node, and \({T}_{i}\) represents the trigger signal, where \(i=\,0,\,1,\,\ldots,{N}\) and \(N\) is the total number of nodes. \({S}_{i}\) represents the sensor element within the i-th node. \({\tau }_{i}\) is the output pulse width of the i-th sensor node.
In this expanded architecture, the serial sensor network not only supports serial configurations but is also adaptable to any network shape. It is equipped with re-routing capabilities to resist disconnections and facilitate assembly. An operation overview is depicted in Fig. 3. The figure’s top left section shows an arbitrary-shaped sensor network. If the network is electrically disconnected (for example, using switches) and a single-stroke path encompassing all nodes is constructible, sensor data can be read using this method. However, such a path is not always guaranteed. Consequently, a communication bus was designed as a two-way road, permitting return travel. For instance, by disconnecting electrically at the position marked by scissors in the top left of the figure, and forming a tree structure in graph theory (defined as a connected graph with no loops nor cut ends) as shown in the bottom right, a single-stroke path can be established following the right-hand rule. Passing through a fork (between ports) emits sensing information, and because each fork is passed only once, individual node readout is possible.
Each node must implement the following steps to achieve this tree structure:
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a.
Cut-End Detection: This prevents signal transmission through ports that terminate due to cut ends, avoiding dead ends that would impede readout.
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b.
Loop Detection: This step is crucial for eliminating loop structures within the network.
The proposed node circuit, as illustrated on the figure’s right side, includes routing circuits at each port. These circuits conduct the following operations:
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1.
Cut-End Detection: If a port’s end is electrically open, the route is switched to cause a U-turn without emitting a signal.
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2.
Perform Sensor Readout: This follows a path according to the right-hand rule.
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3.
Loop Detection: During the readout process, if a signal sent from one’s own port returns from another, a loop is identified. The route is subsequently switched to cause a U-turn, similar to the cut-end detection.
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4.
Repeat Steps 1–4: This repetition ensures all loops and cut ends are eliminated, facilitating the construction of a single-stroke path for networks of any shape.
Because these operations are executed using information within the node, they are autonomously decentralized. The relationship between the number of nodes (\({N}_{n}\)) and the number of loops (\({N}_{l}\)) varies based on the network shape. For instance, in a typical square grid sensor array, \({N}_{l}\) approximately equals \({N}_{n}\) for large sizes. Given that at least one loop is removed in each iteration of Steps 1–4, the typical re-routing time would be, at most, \({N}_{n}\) times the sampling rate.
Circuit design
In this study, we introduce a circuit capable of performing the operations outlined in the previous section. Figure 4a shows the circuit diagram of the routing circuit. For clarity, certain components are simplified and rearranged (detailed circuit diagrams and component specifics can be found in Supplementary Figs. 1–2, 5 and Supplementary Tables 2–4). The communication ports for external nodes are located on the left side of the diagram, whereas those for internal node communication are on the right. Initially, trigger and data signals received at the RTI and RDI terminals are transmitted directly from the upper right to the STO and SDO terminals on the upper left, exiting the node. Signals arriving from external sources enter at the lower right RTO and RDO terminals, move to the right side, and subsequently output from the STI and SDI terminals to other routing circuits within the same node. If a loop or a cut end is detected, the signals received at the RTI and RDI are rerouted by switching the bottom right switches, directing them to STI and SDI, avoiding external transmission.
a Schematic of the re-routing unit. b Operation and wiring potentials of the loop detection section, with and without the presence of a loop. The red line indicates a high-level (Hi) potential, while the blue line indicates a low-level (Lo) potential. Here, STO and SDO are terminals that transmit trigger signals and data signals outside the node. RTO and RDO are terminals that receive trigger signals and data signals from outside the node. STI and SDI are terminals that send trigger signals and data signals to other routing units within the same node. RTO and RDO are terminals that receive trigger signals and data signals from other routing units within the same node. The J, K, and Q ports of the JK flip-flop (JK-FF) elements are the set input, reset input, and output signal port, respectively. The NI port is a port that receives information indicating that an adjacent routing unit has received a signal. OL represents the output of the Loop Detector part, and when it is Hi, it indicates that a loop has been detected.
Cut-end detection is achieved using a circuit with a pull-down resistor connected to the wiring leading to the external port (here, the RTO terminal for the trigger signal). The trigger signal is initially High; if the wiring is intact, it remained High; however, if cut, it turns Low due to the pull-down resistor. An inverter then flips this, outputting High when a cut end is detected.
Loop detection involves determining if other ports have received a signal. In this design, the terminal receiving this information is labeled NI, which turns High when another port receives a signal. This is enabled by inverting the signal at the RTO port of other routing circuits. Figure 4b details the loop detector circuit operation. The Low potential is shown in blue and the high potential in red. When an external signal is sent out, STO drops to Low (Figs. 4b–1), leading to a change in the left switch, connecting RTO to the J port of the JK flip-flop. If a loop is present (Figs. 4b–2a), an adjacent routing unit receives a signal first, turning NI High and triggering the JK flip-flop clock, setting output Q to High. This output disconnects NI and the JK flip-flop clock, ignoring NI’s potential henceforth. Without a loop (Figs. 4b–2b), the unit has already received a signal, RTO remains Low, and the J input of the JK flip-flop stays Low, keeping output Q Low. High output is possible upon detecting a loop. The cut end and loop detection results are combined using OR logic, which controls the route switching switch. Composed of small-scale digital logic circuits, this circuit allows for a compact design with low power consumption and high-speed operation. Furthermore, these operations are autonomously executed during normal readouts, without needing top-down interventions.
Two prototype circuits were developed to validate this design. The first is a basic operation verification circuit with a 12-node network, each node featuring up to three ports. The second, more practical circuit represents an e-Skin, configured as either a 4×4 or 8×8 square matrix array sensor network. Experimental results for these prototypes will be discussed in the subsequent chapters.
Basic operation of sensing and rerouting
Figure 5a shows the small-scale prototype circuit developed for this study. This network included nodes with 2–3 ports and featured two loop structures. The circuit was fabricated using flexible printed circuit (FPC) technology on a polyimide substrate, integrating discrete IC logic components into the sensor nodes. These nodes were equipped with two types of sensors: a resistance-change temperature sensor (thermistor) and an electrostatic capacitance touch sensor, which was created using Cu wiring patterns. For more detailed circuit diagrams, refer to Supplementary Figs. 1, 2 and Supplementary Tables 2, 3.
A sample of the typical output data waveform is displayed in Fig. 5b. In line with the conceptual design, the output was a sequence of continuous pulses, with each pulse width \({\tau }_{i}\) representing the sensor output data. Notably, even in non-serial network structures, re-routing was successfully implemented as discussed earlier, facilitating the serial reading of all sensors as shown in Fig. 5c. In addition, this figure presents data when certain nodes were pressed with a finger (demonstrated in the first part of Supplementary Movie 1), with data labels (i, j) corresponding to node position coordinates in Fig. 5a. The capacitive touch sensor exhibited an immediate response to finger contact. In contrast, the temperature sensor’s response was slower, reflecting typical physical behaviors. The output of the touched node demonstrates a negative fluctuation with a decrease in the thermistor’s resistance to rising temperature.
The re-routing steps are depicted in Fig. 5d. In the initial readout (step 1), the signal propagates along a route following the outer edge of the layout, adhering to the right-hand rule. The circuit was designed with LEDs to indicate detected cut ends or loops, offering visual feedback. In this step, loop detection occurred at node (2,2), where the signal returned from a different port than it was sent from. Consequently, in step 2, the upward port of node (2,2) was blocked, altering the route. This change led to new loop detection at node (1,1), and the rightward port at this node was subsequently blocked, resolving the two loops in the network. This led to the formation of a tree structure as shown in step 3 (refer to the second part of Supplementary Movie 1 for this re-routing operation). As intended in the design, this rerouting process was autonomous and distributed, requiring only a read operation without any special external intervention.
In addition, we investigated the effects of electromagnetic interference (EMI) and temperature fluctuations, which are common concerns in such electronic circuit devices. We exposed the sensors, without shielding, to 2.5 GHz electromagnetic waves, typical of household appliances, using a standard dipole antenna with a maximum output of 1000 mW from a distance of 20 mm. Even under these conditions, no read errors were reported, and the variability in the measured pulse width remained nearly unchanged compared to the conditions without exposure (see Supplementary Fig. 5). As for temperature fluctuations, a change from room temperature to 50 °C resulted in a variation of 0.14% per Kelvin (see Supplementart Fig. 4). We speculate that this was primarily due to the temperature dependence of the threshold value of the logic components used.
Demonstration of modular assembly
The results of different modular assemblies created using multiple grid-type sensor arrays are presented next. Initially, four 4 × 4 array sensor networks were assembled into an elongated cross shape, as shown in the top left of Fig. 6a, with the complete results displayed across Fig. 6a–c. These 4×4 arrays were designed with connectors at their edges, facilitating connection and disconnection between them. In Fig. 6a, a post-re-routing scenario was depicted, highlighting the paths formed by the re-routing algorithm in yellow lines. This algorithm typically generates a clockwise, spiral path starting from the periphery. Figure 6b shows the correlation between the readout steps and the number of sensor nodes read. Nearly every step resolved one loop, with the process converging at the 41st step, coinciding with the total readout of 64 nodes. Additionally, Fig. 6c displays the response of different sensors to manual touch after re-routing, confirming that the sensors at the touched locations were responsive. The re-routing and sensing operations for this configuration were documented in Supplementary Movie 2. The results of assembling the same sensors into a different shape are depicted in Fig. 6d–f. Despite the difference in configuration, as shown in Fig. 6d, a functional pathway could be established. Due to the simultaneous resolution of loops across the four arrays at certain stages, re-routing in this configuration converged more rapidly than in the arrangement depicted in Fig. 6a. In addition, re-routing and sensing operations in this configuration were successful, as demonstrated in Supplementary Movie 3. Furthermore, a cube was constructed using six sheets to demonstrate three-dimensional assembly, with the results presented in Fig. 6g–j. Figure 6g shows the external appearance of the cube, whereas Fig. 6h uses an exploded view to depict the re-routing path. This algorithm successfully created a tree structure even in a three-dimensional shape, enabling the construction of a pathway that could read all 96 sensor nodes, as indicated in Fig. 6i. Moreover, Fig. 6j demonstrates that the sensing operations functioned effectively in this three-dimensional assembly, as shown in Supplementary Movie 4.
a Re-routing paths after assembling into an elongated cross shape. b The relationship between the number of readout steps and the number of sensor nodes successfully read. c Sensing results upon finger touch for the given assembly. d Re-routing paths for an assembly configured into a cross shape with a central void. e Relationship between the number of readout steps and the number of sensor nodes successfully read in this configuration. f Sensing results upon finger touch for this assembly. g Cube assembly using six network boards. h Re-routing paths for the cube assembly, where a and a’ and b and b’ represent interconnected wirings. i Relationship between the number of readout steps and the number of sensor nodes successfully read for the cube. j Sensing results upon finger touch for the cube assembly.
Demonstration of robustness for severances
This section demonstrates the sensor network’s functionality under fault conditions, specifically using an 8×8 grid-type sensor array that was partially severed with scissors. Figure 7a illustrates the network’s appearance and re-routing path after a horizontal cut while ensuring the wiring of the rightmost column remained intact. Additionally, Fig. 7b shows the network after an additional vertical cut. These images confirm that a readout path can still be established even when faults occur in different directions, provided the network is not entirely separated. Unlike deliberate assemblies, faults can occur unpredictably, posing a challenge in identifying the origin of readout data after re-routing. To address this, we ensured that each node in the circuit not only generated pulses representing sensor output but also produced fixed-width pulses that indicate its horizontal (x) and vertical (y) positions. Specifically, each node emited two initial pulses before the sensor data pulses, where the first pulse encoded the x-coordinate and the second encoded the y-coordinate. The fixed-width pulse generation circuit was almost identical to the sensor circuit; the difference was in connecting fixed resistors and capacitors designed to achieve the desired pulse width instead of sensor elements. This configuration allowed for mapping each sensor’s physical location based on the pulse widths corresponding to their coordinates. Figure 7c displays a typical pulse waveform where the first two pulses before the sensor data represent the x and y coordinates, respectively. Based on the output from the network configuration shown in Fig. 7b, Fig. 7d provides a graph plotting the pulse widths for the x-y coordinates. Although the distribution was not uniform, nodes could be feasibly mapped to the 8 × 8 grid without duplication or inversion. Furthermore, Fig. 7e depicts the sensing results based on these assigned positions. Despite several cuts, the network demonstrated smooth operation due to the re-routing mechanism. These cutting and sensing demonstrations are captured in Supplementary Movie 5. Furthermore, the power consumption of this circuit was measured at 1.88 μW per node at a 1 kHz sampling rate, excluding the power used by LEDs.
a Appearance after a single horizontal cut and the corresponding constructed re-routing path. b Appearance after an additional vertical cut and the corresponding constructed re-routing path. c Output pulse waveforms from sensor nodes. d Results plotted on a plane showing the pulse widths indicating the x and y positions outputted from each sensor node. e Sensing operation of the sensor network after being cut twice.
Discussion
The sensor network circuit proposed in this study facilitated the creation of versatile e-Skin products that can be tailored to different robots by cutting and assembling them into multiple shapes. Each node in this network exhibited a readout time of the order of microseconds, with power consumption in the range of several microwatts at a 1 kHz sampling rate. This efficiency allowed the network to scale up to large arrays with thousands of nodes while maintaining millisecond-order response times and milliwatt-order power consumption. Such scalability is a significant improvement over conventional routing methods that depend on high-functionality processors, which this self-routing sensor network circuit does not require. It is important to consider the practical scalability limitations of our sequential time-pulsed readout architecture. The total readout time increases linearly with the number of nodes, posing practical constraints, especially when real-time or high-speed readout is required. However, issues such as timing jitter and pulse broadening, which cause scalability constraints in conventional architectures, are not problematic in our design. This is because we maintain signal quality by regenerating signals at each node using digital logic.
The circuit’s design is notably straightforward. For instance, the grid-type sensor array’s node circuit comprised only 71 logic circuit ICs. This was considerably fewer than even small, low-functionality processor cores, similar to the ARM Cortex-M0 core, which contains 12,000 gates33. Additionally, as the circuit was designed using commercially available discrete ICs, further optimization is feasible if it transitions to an application-specific integrated circuit (ASIC); this potentially enables the configuration of circuits with fewer logic components and drastically reduces power consumption (see Supplementary Note 1). As shown in Supplementary Table 5, our architecture offers performance advantages, including scalability with linear readout time increases relative to the node number, rapid sampling times in the microsecond range, and a low-cost design with minimal circuitry. These features suggest an improvement in efficiency and practicality over previously reported architectures.
Sensor density is crucial in estimating the overall power consumption. The sensor density requirements vary depending on the application and the level of tactile resolution required. For example, human skin has varying mechanoreceptor densities, with approximately 240 receptors per cm² on the fingertips for fine tactile discrimination34. In robotic applications, the necessary sensor density often aims to achieve this level to enable delicate manipulation tasks. Assuming this density as a target, with a power consumption of 1.88 μW per sensor, as observed in the experiment, the power consumption would be 0.451 mW/cm². Even if the sensors were distributed across an entire robotic hand at this density, the total power consumption would only reach several tens of mW, which is considered practical. Although our current prototype uses discrete logic ICs, we believe the circuit can be adapted for thin-film semiconductor technologies in the future, enabling flexible, skin-like sensor networks. Given the primarily digital nature of our circuit, transistor performance is not a critical concern. Additionally, our design requires relatively few transistors, with a typical node circuit needing approximately 500 transistors. Recent advancements in thin-film transistor technology have made densities of up to 30,000 transistors per cm² feasible35. Therefore, a sensor node can be fabricated in an area of approximately 1.3 mm2; this density is comparable to those of mechanoreceptors on human fingers.
During the cutting experiments, a bus wiring within an 8×8 grid-type sensor array was fully severed. In real-world applications, partial fractures are more likely. The bus comprised eight wires, including power, GND, Reset, Set, and four wires for bidirectional trigger and data signal transmission. If any of the first set of wires (power, GND, Reset, Set) were to be partially disconnected, it poses no issue provided that they remain connected within the route. For the trigger and data lines, the current design only detects trigger disconnections, leading to abnormal behavior if only the data line is severed. However, this can be rectified by adding cut detection to the data lines and integrating the results using OR logic. Thus, the system can maintain normal operation even if any subset of the eight wires is severed. Nevertheless, the circuit cannot address all failures, such as partial fractures within a node’s internal wiring. For instance, in the most critical scenario, if the component responsible for sending signals to the next node fails, no signals can be read at all. Practical solutions, such as encapsulating nodes in mold resin or integrating node circuitry into a single ASIC chip, are necessary to minimize internal wiring failures. However, using mold resin encapsulation can increase the overall cost and complexity of the manufacturing process. Although integrating node circuits into a single ASIC chip can reduce the footprint and potentially enhance system reliability, it involves high initial development and manufacturing costs. Among the solutions for addressing internal node failures, single-chip integration is likely the most effective. Given the small scale of the current circuit, single-chip integration would result in a very low probability of internal failures. In that case, the most likely points of failure would be the wiring and the connections between the wiring and nodes, which can be effectively addressed by our proposed method. The next most likely candidates for failure would be the sensor elements themselves. If the sensor element fails in a low-impedance mode, the pulse width becomes shorter; however, this is not critical as other sensor readings can still be obtained. Alternatively, if it fails in a high-impedance mode, similar to an open circuit, the pulse width becomes exceptionally long, and effectively unreadable. This can be countered by placing a fixed resistor in parallel with the sensor element; this setup allows the setting of an upper limit for the pulse width, ensuring that readings are obtained within a specified period.
In terms of sensing quality, our design encodes sensor data as pulse widths, achieving a timing resolution of approximately 3 ns with a 300 MHz clock. Assuming a maximum pulse width of 1 μs, this setup provides approximately 300 levels of resolution, which is roughly equivalent to 8 bits of information. Although this resolution may be lower compared with high-resolution ADCs, which generally range from 12 to 24 bits, the design remains suitable for e-Skin applications where detecting contact or pressure thresholds is more crucial than precision measurements. Applications requiring higher precision might find our approach less adequate, especially those involving sensors that detect minute changes, such as strain gauges. However, with the ongoing development of highly sensitive sensors for e-Skin applications36,37,38, the problem of relatively lower resolution may be alleviated, enhancing the system’s adaptability and performance in the future.For future developments and improvements, the current method of forming sensor nodes using discrete ICs is cost-prohibitive at large scales. Technologies based on printing techniques or simpler circuit chip implementation methods, such as self-organization, are desired. Additionally, although connectors were used in this prototype for simplicity, they are often fragile and prone to failure. Incorporating more robust bonding technologies, such as thermal compression bonding with anisotropic conducting film (ACF), would improve connection flexibility and reliability. Finally, integrating stretchable wiring technologies could further expand the applicability to more diverse and curved surfaces32,39.
Methods
Fabrication
All sensor networks were produced using standard FPC technology, and Yamashita Materials Corporation (Tokyo, Japan) conducted the manufacturing process. The substrate was made of polyimide, and the circuit was constructed with a double-sided two-layer wiring layer. The widths of the signal lines were 0.1 mm, and that of the power supply and ground wiring were 0.2 mm. The backside of the node circuit was reinforced with a fiberglass substrate to prevent fractures and damage caused by bending.
Signal collection
We employed an FPGA board (Pynq-Z2, TUL Corporation, Taipei, Taiwan) to evaluate the pulse width output from these sensor networks and collect data. The pulse width was ascertained by enumerating the clock signals occurring between the edges within a series of pulses inputted into a low voltage differential signaling (LVDS) port. The clock frequency was established at 330 MHz, which rendered the pulse width measurement resolution as 1/(330 MHz) = 3.03 ns. The counted clock cycles, representing the measured pulse widths, were sequentially recorded in block ram (BRAM). After the measurements were abtained, the BRAM contents were transferred to a PC for further data analysis. We utilized an oscilloscope (MSOX3024T, Keysight Technologies, CA, United States) to visualize the pulse waveforms (Fig. 5b and Fig. 7c). The FPGA board is powered by universal-serial-bus (USB) (5 V) from the PC, and the sensor network is powered from the VDD port (5 V) of the FPGA board.
Processing and analysis
In the sensing demonstrations of Figs. 5c, 6c–j and 7e, pulse width count data was collected at approximately 20 Hz intervals using the aforementioned method. The pulse width was then converted into time based on the FPGA’s clock frequency (330 MHz). By subtracting the initial pulse width, the data was converted into pulse width variation and plotted on each graph.
For the relationship between the number of read nodes and the number of read steps in Fig. 6b–i all contents of the BRAM were reset to zero in advance. The readout of pulse widths was then repeated to obtain the number of read nodes from the number of memory slots containing non-zero significant data.
In the cutting demonstration with scissors (Fig. 7), common office scissors were used to perform the cutting. During this process, no special operations, such as turning off the circuit power, were conducted. After cutting, the number of sensor readings decreases, so when this decrease is detected, the routing is reset, automatically re-establishing the readout path.
Data availability
The source data for all the graphs generated in this study are provided in the Supplementary Information/Source Data file. Source data are provided with this paper.
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Ozaki, T., Ohta, N. & Fujiyoshi, M. Self-rerouting sensor network for electronic skin resilient to severe damage. Nat Commun 16, 1196 (2025). https://doi.org/10.1038/s41467-025-56596-1
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DOI: https://doi.org/10.1038/s41467-025-56596-1