Main

The early academic successes of silicon spin-qubit technology1,2,3,4,5,6,7,8 created enthusiasm for the idea that these qubits could be fabricated in industrial 300-mm manufacturing lines9,10,11,12. Potential advantages include the ability to leverage advanced fabrication processes, to integrate qubits with modern electronics and to benefit from the existing capabilities of mass manufacturing at low costs12. Over the past decade, there have been a number of proposals for potential architectures that could be used to realize a scalable quantum computer based on silicon spin qubits13,14,15,16,17.

However, recent attempts to fabricate spins-in-silicon quantum dots using industrial-scale fabrication has raised awareness about the material challenges that must be faced. For example, it is crucial to reduce the charge noise and static disorder arising due to defects and traps at interfaces and oxides18,19,20. High-fidelity single-qubit operations can be performed with minimal impact from charge noise because the electron spin couples to the noisy electric fields only through its weak spin–orbit effects21,22,23,24,25. By contrast, other operations, including qubit initialization, read-out and exchange-based two-qubit gates, are more sensitive to the charge noise present in conventional metal–oxide–semiconductor gate stacks19,24.

This sensitivity has motivated the search for ways of mitigating the effects of charge noise, including moving spin states away from the interface to quantum wells26,27. However, from a scaling perspective, it is desirable to reconcile as much as possible conventional complementary metal–oxide–semiconductor (CMOS) processes with qubit fabrication to leverage the mature CMOS industry to the fullest extent. Moreover, the formation of quantum dots against thin oxides has several benefits, such as a large electric field that leads to large valley splitting18,28,29 and efficient electrostatic coupling between the gate voltage bias and the channel, allowing for well-isolated states, efficient exchange coupling control29 and fast gate-based read-out30.

In this work, we study four two-qubit devices fabricated using a long-established CMOS geometry, namely a planar metal–oxide–semiconductor with polysilicon gates31. We demonstrate for all devices all basic qubit operations, including one- and two-qubit gates, initialization and read-out, with error rates approaching and surpassing the fault-tolerance threshold for the widely studied surface error correction code32. We obtain these error rates using state-of-the-art gate set tomography (GST) tools33,34, allowing us to pinpoint effects such as crosstalk and the breakdown between stochastic and coherent errors. Our studies indicate unprecedented reproducible low error levels while also identifying clear pathways to further reducing errors.

Device operation

The qubit devices were designed by Diraq and fabricated at imec in a 300-mm spin-qubit process flow that is described in Methods. The resulting wafer consists of several devices covering a range of feature sizes and configurations. We chose the design that we estimated would have optimal device parameters, and we tested four of these devices (denoted A–D). The design consists of a double quantum dot and a nearby single-electron transistor (SET) for spin read-out1 (Fig. 1a).

Fig. 1: Two-qubit device and operation points.
figure 1

a, Schematic of a Diraq two-qubit device fabricated on a 300-mm wafer, showing the full wafer, single die and single device level. b, Charge stability diagram of device A as a function of plunger (P1 and P2) voltage detuning ΔVP = ΔVP1 = −ΔVP2 and exchange gate (J) voltage VJ, showing four isolated electrons in the double-dot system. Devices B–D were also measured in the (3,1) charge configuration and showed analogous charge stability diagrams. Voltage points for single-qubit operation (Joff < 1 kHz), two-qubit operation (Jon ≈ 1 MHz) and read-out are shown as a triangle, inverted triangle and star, respectively. The faint charge transition starting from VJ = 1.05 V is very weakly coupled to the quantum dot and probably corresponds to charge movement outside the active dot confinement area. In device D, we observed similar charge movements outside the active dot region; devices B and C showed none. Inset, Cross section of the double-quantum-dot device indicating the number of electrons under the plunger gates (P1 and P2), exchange gate (J) and double potential well. Scale bars, 100 nm (a, top), 10 mm (a, middle), 300 mm (a, bottom). a.u., arbitrary units.

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We operated the devices in a 3He/4He dilution refrigerator with a base temperature of 10 mK in isolated mode, with four electrons in the double dot formed under the plunger gate electrodes (P1 and P2). A voltage applied to an interstitial exchange gate (J) controlled the tunnel coupling between the dots1,35,36. The electrons were loaded from a two-dimensional electron gas formed under the reservoir gate, which overlaps with an n++ implanted ohmic region. The Pauli spin blockade at the (3,1)–(4,0) charge transition was used for spin parity read-out and the signal was measured using the SET in d.c. mode (Fig. 1b). SET charge-noise measurements reveal a 1/fα power spectral density with α between 0.50(7) and 1.19(5) and an amplitude of 0.79(4)–\(0.98(7)\,{\rm{\mu }}{\rm{eV}}/\sqrt{{\rm{Hz}}}\) at 1 Hz (Extended Data Fig. 1), in line with previous low charge-noise results from devices fabricated using similar methods19,21.

A static magnetic field B0 in the range 0.662–0.7 T split the spin states to form the single-qubit states, which were manipulated with on-resonance microwave signals applied to the electron spin resonance antenna with frequency fESR. Single-qubit Xπ/2 gates were formed with timed microwave pulses on resonance with the qubit Larmor frequencies fL,Q1 and fL,Q2 (Fig. 2), whereas Zπ/2 gates were implemented as virtual gates through rotations of the reference frame37. The single-qubit metrics, including spin lifetime and Ramsey and Hahn coherence times, for the four devices are shown in Table 1.

Fig. 2: Single-qubit operation of device A.
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a,b, Rabi chevrons for qubits 1 (a) and 2 (b). Probability of reading out an even or blockaded spin state Peven, when applying microwave signal at the frequency fESR – fLO for a duration of tESR. c,d, Coherent Rabi oscillations at fL,Qi for qubits 1 (c) and 2 (d). Real-time feedback is implemented to counteract the Larmor frequency deviation39. The local oscillator frequency is set to fLO = 18.610 GHz. The microwave power applied to qubit 1 is approximately 7% larger than that to qubit 2 resulting in matching Rabi frequencies of fRabi = 658.6(3) kHz.

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Table 1 Device performance reproducibility
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Figure 3 details our implementation of two-qubit control. A voltage pulse, typically of duration tCZ between 100 ns and 500 ns, was applied to the J gate to control the exchange interaction strength (Fig. 3a–c). We performed the two-qubit gate at the symmetric charge operation point to reduce the sensitivity to the detuning noise38 (Fig. 3d). We extracted from the fitted exchange frequencies in Fig. 3c an exchange controllability of 18.4 dec V−1 (devices A–D are compared in Fig. 3e). By combining a pulsed exchange interaction with single-qubit phase rotations, we were able to implement a controlled-Z (CZ) two-qubit gate1 (Fig. 3f,g). Using real-time feedback, we tracked and corrected the SET voltage operation point and the single-qubit Larmor and Rabi frequencies39 (see Extended Data Fig. 3 for details). We used a heralded initialization protocol to check if the qubit system was successfully initialized in the \(| \downarrow \downarrow \rangle \) state, and we repeated the initialization if unsuccessful7,40.

Fig. 3: Two-qubit operation of device A.
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a,b, Probability of detecting an even spin state Peven after a microwave burst of fixed power and duration at different J gate voltages VJ when preparing a mixed odd state of \(| \downarrow \uparrow \rangle \) and \(| \uparrow \downarrow \rangle \) (a) and a pure even state \(| \downarrow \downarrow \rangle \) (b). The power and duration of the microwave burst are roughly calibrated to a single-qubit π rotation. The local oscillator frequency is set to fLO = 18.610 GHz. The mixed odd state is initialized with a tramp = 1 μs ramp at VJ = 0.96 V over the anti-crossing and the even state with heralded initialization based on a tramp = 1 μs ramp at VJ = 1.12 V. All experiments throughout the paper were conducted with an even state \(| \downarrow \downarrow \rangle \) initialization, unless otherwise specified. c, Controlled phase (CZ) oscillation as a function of exchange time texchange and exchange gate voltage VJ. We apply dynamical decoupling by a consecutive π rotation on both qubits to filter out other phase-accumulating effects, such as Stark shift. d, Decoupled exchange oscillation fingerprint for fixed exchange time texchange = 10 μs as a function of plunger voltage detuning ΔVP and exchange gate voltage VJ. The triangle indicates the exchange gate voltage used for the CZ gate. e, Exchange strength as a function of exchange gate voltage extracted from fitting exchange oscillations in c. The controllability is fitted assuming Jexchange ∝ a exp bVJ, resulting in a range between b = 9.78 dec V−1 and 18.44 dec V−1 across devices A–D. The variation in exchange controllability across the devices is probably due to fabrication variability. f,g, Calibration of the CZ single-qubit phase correction by preparing the target spin in superposition, applying a CPHASE followed by a virtual phase rotation for qubits 1 (f) and 2 (g)4,7. Vertical lines indicate the phase values for which the spin state of Q1 (Q2) is flipped if Q2 (Q1) is in the on/spin-up state. The read-out probability is unscaled in all data.

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Two-qubit benchmarking

To precisely capture errors in qubit operation, we designed a GST experiment comprising the full gate set {II, XI, IX, ZI, IZ, CZ}, from which we constructed a list of ‘preparation’ and ‘measurement fiducials’ circuits. Combining these fiducials with ‘germ’ circuits up to length 16, we obtained a list of 12,263 unique sequences34. We chose GST as the benchmarking method because it yields the error taxonomy with specific error channels and is generally a higher bar for fidelities than the more commonly used interleaved randomized benchmarking, which often overestimates fidelities8.

We implemented an idle gate with a total idle time equal to the duration of a CZ gate. Single-qubit gates in the two-qubit context were achieved by rotating one qubit π/2 around the \(\widehat{x}\) axes (XI and IX) and \(\widehat{z}\) axes (ZI and IZ), while the other qubit was idling. The XI and IX gates were implemented by applying a microwave square pulse of around 400 ns, including a 20-ns smooth sine ramp, at fL,Q1 and fL,Q2 for qubits 1 and 2, respectively. The ZI and IZ gates were implemented by virtually rotating the reference frame for qubits 1 and 2, respectively. The entangling two-qubit CZ gate was implemented by applying a voltage pulse to the exchange gate J for a duration of tCZ.

Figure 4 breaks down the error generators and their contribution to the infidelity for each gate and device. Across all four devices operation accuracies are above 99%. For example, for device A, the gate fidelities are 99.45(5)%, 99.55(4)%, 99.95(4)%, 99.96(4)%, 99.74(9)% and 99.37(5)% for the XI, IX, ZI, IZ, II and CZ, respectively (see first row of Table 1). The combined state preparation and measurement (SPAM) fidelity even exceeds 99.9% with FSPAM = 99.95(8)%, which is one of the highest reported values for industrially fabricated spin qubits (Extended Data Fig. 4). Single-qubit on-target gate fidelities FX,Q1 = 99.97(15)% and FX,Q2 = 99.81(11)% are comparable to previously reported values for devices made using the same fabrication processes21.

Fig. 4: Two-qubit benchmarking using GST.
figure 4

a–d, Infidelity contributions of Hamiltonian and stochastic error generators across all four devices for the XI (a), IX (b), II (c) and CZ (d) gates from GST. Hamiltonian errors contribute to the infidelity in second order, whereas stochastic errors contribute in first order. Stochastic errors, particularly the idling ZI and IZ error generator components, dominate the infidelity by more than an order of magnitude. All gate fidelities across all devices are above 99%. Error bars represent the 95% confidence level. For visibility, only those of the IZ and ZI error generators are displayed.

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Reproducibility

All four devices have fidelities of 99% or higher across all operations, with XI (IX), ZI (IZ) and CZ gates ranging between 99.23(3)% and 99.59(15)% (99.18(5)% and 99.64(3)%), between 99.95(5)% and 99.97(3)% (99.95(5)% and 99.97(3)%) and between 99.04(16)% and 99.56(6)% (Table 1). Furthermore, the stochastic IZ and ZI error generators dominate the infidelity contributions across all devices. In particular, the stochastic IZ component is larger for the CZ gate compared with the I gate, which is probably related to the (3,1) charge configuration used in all devices. In future work, a systematic study of the (1,3) charge configuration, as well as higher electron occupations such as (3,3) across several devices, would provide valuable insights into the physical origin of the observed error mechanisms. SPAM fidelities reproducibly exceed 99.9% for three out of the four devices (devices A, C and D). For device B, we achieved a SPAM fidelity of 99.33(9)%. We attribute this slightly reduced SPAM fidelity to signs of gate leakage between the SET barrier and the ohmic contacts. Similarly, device D shows leakage between the SET barrier and the plunger gate used to form qubit 2, which is the probable cause of the reduced spin relaxation and coherence time of qubit 2 (Table 1).

Additionally, we performed d.c. cryo-probing measurements on a further 16 devices: one with the same design parameters as devices A–D and 15 with different design parameters, all from the same imec wafer. These measurements indicate excellent uniform electrostatic control over all device gate electrodes (Extended Data Fig. 5).

Discussion

Device A exemplifies the high performance of qubits on the 300-mm wafer and can, therefore, be used as a case study to examine the sources of infidelity. In the following sections, we analyse the GST error contributions and their probable physical origins in device A, as well as its qubit performance as a function of magnetic field. Based on the consistency of the dominating errors reported in Fig. 4 and the similarity of the Larmor frequency dynamics in Extended Data Fig. 3, we expect this conclusion to hold for all four devices.

The ZI and IZ gates were implemented virtually and are, therefore, in principle error-free. However, the clock update on the field-programmable gate array took a finite time, leading to slight imperfections in these virtual operations due to idling errors. Hence, we attribute their infidelities, 0.05(4)% (0.04(4)%) for ZI (IZ), to a small time delay in the control hardware.

Most importantly, the largest contribution to infidelity for the XI, II and CZ gates is the stochastic IZ error generator, whereas the IX gate is limited by the stochastic ZI error generator, with the second highest contribution being the stochastic IZ error generator, followed by the stochastic IY error generator (Fig. 4). The stochastic dephasing error generator of the qubit undergoing a π/2 rotation (ZI for the XI gate and IZ for the IX gate) is significantly larger for the IX gate than for the XI gate. However, for the idle qubit (IZ for the XI gate and ZI for the IX gate), it is significantly larger for the XI gate than for the IX gate. Similarly, the infidelity contribution to the II gate from the stochastic dephasing error generator IZ (0.15%) is larger than for ZI (0.09%).

First, these error contributions could be explained by the coupling of 29Si nuclear spins to the electron spin state of qubit 2 (ref. 41). Qubit 1 also experiences quasi-static changes in the Larmor frequency, but these are of lower magnitude, despite the Stark shifts of qubit 1 being larger (Extended Data Fig. 3). This is another indication that hyperfine-coupled residual 29Si nuclear spins are the origin of that noise. As expected, these idling errors are roughly doubled (tXI = tIX = 400 ns) in comparison with the idling gate, which only takes around half the time. Comparing the II gate with the CZ gate, the stochastic ZI error generator remains constant (0.09%), but the IZ error generator more than doubles (0.40%), despite both gates having the same duration tII = tCZ = 212 ns. However, during CZ gate operation, the tunable exchange barrier is lowered to enable the Heisenberg exchange. This leads to a shift in the centre of the electron wavefunction, possibly moving qubit 2 closer to the 29Si nuclear spin, thus increasing the contact hyperfine interaction and the quasi-static noise in IZ.

Second, it might seem contradictory that the gate infidelity is dominated by noise in qubit 2, given that \({T}_{2,{\rm{Q}}2}^{{\rm{Hahn}}} > {T}_{2,{\rm{Q}}1}^{{\rm{Hahn}}}\) and \({T}_{2,{\rm{Q}}2}^{* }\approx {T}_{2,{\rm{Q}}1}^{* }\). However, the GST experiments are designed to amplify, not echo out, persistent noise sources. They are, therefore, heavily affected by slow noise, such as Larmor frequency changes arising from hyperfine-coupled nuclear spins. On the other hand, Hahn echo experiments are limited by fast charge noise. The Larmor frequency variation, tracked during the GST experiment using real-time feedback39,40, shows a higher standard deviation for the qubit 2 frequency variation compared with qubit 1 (Extended Data Fig. 3). Furthermore, the infidelities of the XI, IX, II and CZ gates decrease for higher Larmor feedback rates, with the main contribution again being the stochastic IZ error generator for the XI, II and CZ and the stochastic ZI error generators for the IX gate (Extended Data Fig. 6).

Third, sequences between which the Larmor frequency feedback exhibits a large frequency change can be removed from the GST dataset, but this has a significant effect only on the stochastic IZ error generator of the XI gate (Extended Data Fig. 7). Moreover, the spread of the Larmor frequency is independent of B0, whereas the Stark shift increases linearly (Extended Data Figs. 8 and 9) and the spin–orbit interaction in qubit 1 is stronger compared with qubit 2, as can be seen in Fig. 3a,b. The standard deviation of the Larmor frequency feedback increases in a step-like manner as a function of total experiment runtime for distinct instances across all magnetic fields (Extended Data Fig. 10). Hence, these slow timescale jumps probably originate from qubit 2 coupling strongly to the nuclear spin states of the residual 29Si atoms. As such, they contribute significantly to the gate infidelities and are the cause of the above-described observations2,42,43. These slow jumps in the Larmor frequency do not contribute to \({T}_{2}^{{\rm{Hahn}}}\) and, therefore, do not contradict \({T}_{2,{\rm{Q}}2}^{{\rm{Hahn}}} > {T}_{2,{\rm{Q}}1}^{{\rm{Hahn}}}\).

In terms of qubit device performance, Fig. 5 shows spin lifetime and coherence metrics as functions of the magnetic field B0. T1 and \({T}_{2}^{* }\) first increase up to B0 = 0.3–0.4 T, followed by a decrease for larger B0. Because \({T}_{2}^{* }\) is sensitive to d.c. noise, it samples 1/f noise down to frequencies corresponding to the total time of the experiment, which renders it a bad metric for comparing different qubits or qubit platforms. Including Larmor frequency feedback in the experiment reduces the contribution of low-frequency 1/f noise44. We demonstrate this in Extended Data Fig. 11a,b by plotting \({T}_{2}^{* }\) as a function of the cumulative measurement time. Most curves are approximately flat, showing the effectiveness of the feedback mechanism. Extended Data Fig. 11c,d show the variation of \({T}_{2}^{* }\) as a function of laboratory time.

Fig. 5: Magnetic field dependence of coherence times for device A.
figure 5

a–c, Spin lifetime T1 (a), Ramsey \({T}_{2}^{* }\) (b) and Hahn echo \({T}_{2}^{{\rm{Hahn}}}\) (c) metrics as functions of the applied magnetic field amplitude B0. We measured both qubits for each experiment interleaved and repeated this 50 (T1), 10,000 (\({T}_{2}^{* }\)) and 2,000 (\({T}_{2}^{{\rm{Hahn}}}\)) times. Ramsey experiments at B0 = 0.05 T, 0.1 T, 0.8 T and 1.1 T were repeated 50,000, 100,000, 50,000 and 40,000 times. The Hahn echo experiment at B0 = 1.3 T was repeated 500 times. Between each repeat we used real-time Larmor frequency feedback following the protocol described in ref. 39. The data were fitted using the functions described in Extended Data Fig. 2. Data shown as stars correspond to metrics measured during two-qubit benchmarking (Extended Data Fig. 2), using a method and gate voltages that differed from those used for the magnetic field sweep. Error bars represent the 95% confidence level.

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The longest measured coherence times for device A include Hahn echo coherence time \({T}_{2}^{{\rm{Hahn}}}=\text{1,900}\,{\rm{\mu }}{\rm{s}}\) (1,805 μs) for qubit 2 (qubit 1) measured at the low magnetic field of B0 = 50 mT, as well as \({T}_{2}^{* }\) = 40.6 μs (39.0 μs) and T1 = 9.5 s (4.7 s). The long \({T}_{2}^{{\rm{Hahn}}}\) and its small variation between both qubits indicate that magnetic noise dominates at low fields. On increasing B0, the Stark shift increases linearly (Extended Data Fig. 9), with steeper slopes for qubit 1 (ΔΩStark(P1, J, P2) = (−19.9(4), 31.3(3), 14.2(4)) MHz V−1 T−1) than for qubit 2 ((0, 3.2(2), 16.7(4)) MHz V−1 T−1), manifesting in stronger coupling to charge noise through the spin–orbit interaction and resulting in reduced coherence, with a 33% larger \({T}_{2,Q2}^{{\rm{Hahn}}}=617(26)\,{\rm{\mu }}{\rm{s}}\) (\({T}_{2,Q1}^{{\rm{Hahn}}}=464(22)\,{\rm{\mu }}{\rm{s}}\)) at B0 = 1.3 T. The observed Stark shift is entirely caused by the intrinsic spin–orbit coupling of silicon electrons confined at the Si/SiO2 interface. For device A, the external magnetic field points in the [110] lattice orientation, where the variability of the g factor is highest and the Dresselhaus spin–orbit component dominates. This type of spin–orbit coupling is largely influenced by atomistic roughness at the Si/SiO2 interface29. In the presence of a gate bias, the quantum dot moves under the rough interface, shifting its g factor. The magnitude and sign of the resulting Stark shift depends on the direction in which the gate moves the quantum dot. Typical values range between −80 MHz V−1 T−1 to 80 MHz V−1 T−1 (ref. 25). In device A, we obtained −20 MHz V−1 T−1 to 30 MHz V−1 T−1, which falls within that range. The magnetic field dynamics of the spin coherence times are distinct from previous results for academic devices7, and the exact physical origin requires a more detailed study, which is beyond the scope of this work.

Looking forward, the increase in \({T}_{2}^{{\rm{Hahn}}}\) for low fields is extremely encouraging because it indicates that the qubits are amenable to more scalable control techniques. Such approaches continuously drive the spin by using a modulated microwave field to decouple it from noise and eliminate free precession (\({T}_{2}^{{\rm{Hahn}}}\gg {T}_{2}^{* }\))36,45. Operation at lower fields requires a different modality of the two-qubit gate. To achieve similarly fast gates, a SWAP-like operation will be implemented. Furthermore, at low fields an always-on, global control is beneficial for avoiding idling errors and using the long decoupling times \({T}_{2}^{{\rm{Hahn}}}\gg {T}_{2}^{* }\) observed. This can be achieved by aligning the magnetic field direction such that the Larmor frequencies of the qubits become degenerate45. The key challenge for that operation modality is sufficiently large Stark shifts.

Our chosen implementation of an entangling gate (CZ) is faster than decoupling schemes, but it relies on the exchange interaction being smaller than the Zeeman energy difference of the two qubits (Jexc ≪ ΔEZ). We chose B0 values in the range 0.662–0.7 T to meet this requirement, but in future, we intend to explore other two-qubit gate implementations8.

Conclusions

We have demonstrated high-fidelity control of semiconductor qubits industrially manufactured in a 300-mm pilot line. In contrast to previous publications in which charge noise is identified as the key limiting factor3,4,5,8,38,46,47, our results are strongly encouraging from a noise-analysis perspective, both in terms of the fidelity values themselves, and in view of the clear pathway they pave towards further improvement through further nuclear purification. Further isotopic enrichment of the 400-ppm 29Si used in this work to levels at or below 50 ppm has already been demonstrated in academic prototype devices7. This is consistent with previous results showing the effect of nuclear spin noise on coherence times in Si/SiGe quantum-dot spin qubits20.

We have shown that using engineering practices in an industrial setting can lead to state-of-the-art spin-qubit performance when coupled with a systematic search for target performance metrics. It is crucial to understand the connection between qubit performance and measurements that can be performed during the fabrication process, such as electrical noise and Hall bar transport19,48. These investigations are in their infancy and will require an increasingly accurate model of the quantum behaviour of electrons in semiconductor devices.

In the long term, further improvements will be required on the qubit front, for which our noise analysis provides a first-order angle of attack. To reduce the overhead for fault-tolerant quantum computing32, 99.9% fidelities across all operations is a realistic target.

At this stage, a statistical analysis of these qubits at a larger scale is not yet available. The consistent calibration of qubits at the level demonstrated here remains an intensive manual process with a number of scientific insights gained along the way. Automation of this process needs to mature to consistently achieve these results in a mass-characterization campaign49. Having silicon–metal–oxide–semiconductor (SiMOS) qubits fabricated in a foundry environment readily available will facilitate the future demonstration of large-scale SiMOS qubit arrays. This has so far been challenging for SiMOS spin qubits because it has been difficult to fabricate devices with small gate pitches and low charge-noise interfaces.

These results could be leveraged to design quantum error correction strategies to cater to the specific demands of spin qubits. However, further studies will be needed to characterize qubit operations in a more scalable setting, such as under a single global microwave field and under elevated temperatures, which will inevitably be imposed by the heat dissipated by the co-integrated control electronics on the CMOS chip50,51,52. Our reproducible demonstrations of high-quality qubit operation made using 300-mm foundry processes offer a proof of principle that should encourage further industrial research into far more complex technologies that are at the disposal of foundries.

Methods

Fabrication

The fabrication method used at imec was optimized for low charge noise, high uniformity19,31,53,54 and qubit-specific integration with a gate pitch smaller than 100 nm. Fast fabrication cycles and design flexibility were ensured by optimally combining optical lithography and electron-beam lithography. Fabrication started with the epitaxial growth of an isotopically enriched layer of silicon with a residual concentration of 400 ppm 29Si. A high-quality thermally grown oxide forms the Si/SiO2 interface at which the charge of the electron spin qubit accumulates. Dedicated cleaning processes and 300-mm pilot line process control are key to the development of the high-quality interface19. Next, a triple-layer overlapping polysilicon gate stack was formed using electron-beam lithography and dry etching, with each gate separated by a thin interstitial high-temperature oxide deposit19. The highly doped polysilicon gates reduced the interface strain at cryogenic temperatures54,55. Finally, an aluminium strip line was patterned so that single spin states could be manipulated using electron spin resonance, offering a control solution at the few-qubit level50,52 (Extended Data Fig. 12).

Measurement

Devices A, B, C and D were measured in Bluefors XLD400, Bluefors LD400, and two different Oxford Instruments K100 Kelvinox dilution refrigerators, respectively, and mounted on the cold finger. Previous work conducted with similar experimental set-ups indicates that the electron temperature was 200–300 mK (ref. 56). An American Magnetics AMI430 supplied static external magnetic fields to devices A, B and C, with the field for A pointing in the [110] direction of the Si lattice and those for B and C pointing in the [1\(\overline{1}\)0] direction. The field for device D was supplied by an Oxford Instruments IPS120-10 pointing in the [1\(\overline{1}\)0] direction of the Si lattice.

We used a Q-Devil QDAC-II to supply d.c. voltages through filtered lines with a bandwidth of up to 20 Hz. Dynamic voltage pulses were generated with a field-programmable gate array, in this experiment the Quantum Machines Operator-X+ (OPX+). The pulses were combined with d.c. biases using custom linear bias combiners at room temperature. The OPX+ had a sampling time of 1 ns.

The dynamic pulse lines in the fridge had a bandwidth of up to 50 MHz, which translated into a minimum rise time of 20 ns. We accounted for this by smoothing out fast a.c. pulsing. Microwave pulses were generated by a vector signal generator (PSG8267D, Keysight). The in-phase and quadrature and pulse modulation waveforms were generated by the OPX+.

The charge sensor comprised a single-island SET in d.c. mode. The SET current integrated for tint = 100 μs was amplified using a room-temperature I–V converter (Basel SP983c) and sampled by the OPX+. At this stage, we used d.c. mode read-out, which was limited by the bandwidth and noise of the room-temperature transimpedance amplifier, leaving high-bandwidth cryogenic current amplification for future work.

Gate times were optimized based on a trade-off between speed and lifetime. The magnetic field amplitude B0 was chosen in the range 0.662–0.7 T, such that the single-qubit Rabi QRabi = fRabiTRabi was maximized. Simultaneously, the chosen implementation of entangling gate relied on the exchange interaction being smaller than the Zeeman energy difference of the two qubits (Jexc ≪ ΔEZ). We chose our B0 values to meet this requirement.