Introduction

The advent of mechanical exfoliation techniques for obtaining atomically thin graphene has catalyzed the exploration and application of various two-dimensional (2D) materials1. These 2D materials are characterized by reduced dimensionality, a high surface-to-volume ratio, mechanical flexibility, and unique optical properties and have shown immense potential for various nanotechnological applications2,3,4,5. Among these, transition metal dichalcogenides (TMDs) have gained significance owing to their diverse range of electronic properties, ranging from semiconducting to semi-metallic, metallic, and superconducting behavior6,7. This wide range of properties has made TMDs promising materials for technological advancement of the existing nanoelectronic devices.

Semiconducting TMDs, including MoS2, MoSe2, WS2, and WSe2, are particularly notable for their intrinsic bandgaps, which are in stark contrast to the zero bandgap of graphene. This characteristic makes TMDs particularly promising channel materials for field-effect transistors (FETs). A significant advantage of TMDs is their ability to be scaled down to a monolayer thickness (0.6–0.7 nm) without compromising their semiconducting properties, thereby substantially enhancing FET performance. In contrast, conventional three-dimensional semiconductors encounter severe challenges at such reduced dimensions, predominantly owing to increased carrier scattering at the channel-to-dielectric interfaces, which severely degrades their carrier mobility8. Furthermore, the inherent absence of dangling bonds in TMDs results in superior channel-to-dielectric interfaces, further improving FET performance8. Consequently, TMD-based FETs (2D FETs) have garnered extensive attention because of their potential to outperform traditional silicon-based FETs. Recent studies have demonstrated the feasibility of fabricating complex electronic components using 2D FETs, including microprocessors9, operational amplifiers10, and SRAM cells11.

Mobility is a critical parameter for evaluating FET performance because it directly affects the current-carrying capability and switching speed of the device. Theoretical estimates based on density functional theory provide the intrinsic mobility for semiconducting TMDs. For example, MoS2 has an intrinsic mobility (µ0​) of approximately 270 cm2V-1s-112. However, the experimental field-effect mobilities (µFE) observed in MoS2-based FETs are significantly lower, generally in the 30–60 cm2V-1s-1 range, as summarized in Supporting Table S1. This significant discrepancy highlights the impact of various scattering mechanisms, including phonon scattering from dielectrics, Coulomb scattering from charge impurities, defect-induced scattering, and interfacial surface roughness13. Therefore, a thorough analysis of these scattering mechanisms is essential to accurately assess the mobility and performance potential of 2D FETs.

Specifically, these scattering effects are predominantly influenced by the transverse electric field from the gate, making the following factors crucial determinants of mobility: thickness and permittivity of the gate dielectric and the channel thickness14. However, as indicated in Supporting Table S1, changes in the gate dielectric or MoS2 thickness did not exhibit a consistent impact on the µFE. This inconsistency is largely attributed to the methodology used for extracting µFE. Typically, µFE is derived from the transfer characteristic (drain current versus gate voltage characteristic, ID−VG) and its differentiation (transconductance, gm=∂ID/∂VG) in the FET’s linear region. This can be expressed as:

$${I_D}=\frac{W}{L}{\mu _{FE}}{C_{ox}}\left( {{V_G} - {V_T} - \frac{{{V_D}}}{2}} \right){V_D}$$
(1)
$${\mu _{FE}}=\frac{{d{I_D}}}{{d{V_G}}}\frac{L}{{W{C_{ox}}{V_D}}}={g_m}\frac{L}{{W{C_{ox}}{V_D}}}$$
(2)

where L and W denote the channel length and width, respectively, Cox is the gate dielectric capacitance per unit area, and VT and VD denote the threshold voltage and drain bias, respectively, with the source bias (VS) assumed to be grounded. However, this approach is prone to inaccuracies owing to the influence of series resistance (Rs), which can distort the measured ID values. Moreover, the differentiation process used to obtain gm tends to amplify the measurement noise, further propagating errors into the extracted µFE. Furthermore, the inaccuracy in the extracted µFE is exacerbated by the arbitrary selection of the VG range for linear regression when determining gm. Therefore, an accurate mobility extraction methodology should be employed to minimize, or potentially eliminate, the effects of Rs​ and its dependence on the arbitrary choice of the VG​ range.

In this study, we present an advanced polynomial Y-function method designed for the precise extraction of mobility parameters in 2D FETs, improving upon existing approaches by accurately distinguishing between various scattering mechanisms and enabling the simultaneous extraction of the threshold voltage. MoS₂ was chosen as the model material because it is the most extensively studied among semiconducting TMDs, offering a rich accumulation of experimental results and literature data. This extensive background provides a robust foundation for benchmarking the proposed extraction methodology. Through a comparative analysis of mobilities extracted from MoS₂ FETs with both back-gate (BG) and top-gate (TG) configurations, we identified and corrected the inaccuracies present in previously reported mobility values. Our results demonstrate the enhanced precision and reliability of the proposed method, establishing it as a robust tool for characterizing the transport properties of 2D FETs.

Background of Y-function method

The Y-function method was developed to provide a more accurate extraction of the mobility parameters15. The theoretical basis of the Y-function method is detailed in Supporting Notes 1.1 and 1.2. The Y-function is defined in the linear region of the FET with a very low VD. It is expressed as:

$$Y \equiv \frac{{{I_D}}}{{\sqrt {{g_m}} }}=\sqrt {{G_m}} {V_{Gt}}$$
(3)

where Gm = (W/L)µ0CoxVD is the static transconductance, and VGt = VG − VT − VD/2 represents the effective gate drive voltage. This method leverages the fact that ID and gm are similarly affected by Rs, allowing the Y-function to minimize the impact of Rs on the extracted mobility. Equation (3) implies that the linear regression of the Y-function against VGt facilitates the extraction of VT​ and Gm, which are identified as the x-axis intercept and slope of the regression line, respectively. Once Gm is determined, µ0 can be calculated using known values of W, L, Cox, and VD.

Furthermore, the Y-function method can isolate the effects of various scattering mechanisms on the mobility by differentiating between phonon scattering, surface roughness scattering, and Coulombic interactions. This is achieved through the extraction of specific attenuation factors, which quantify the impact of each scattering type on the mobility degradation, allowing for a more precise evaluation of the carrier transport properties in 2D FETs. Specifically, the scattering effects induced by the transverse electric field degrade mobility, making it dependent on VGt. To capture this dependency, µFE is typically modeled with a low-field mobility µ0 and two attenuation factors θ1 and θ2 as:16,17

$${\mu _{FE}}=\frac{{{\mu _0}}}{{1+{\theta _1}{V_{Gt}}+{\theta _2}{{\left( {{V_{Gt}} - \Delta {V_T}} \right)}^2}}}$$
(4)

Here, θ1 represents the contributions of phonon scattering and Rs on mobility degradation. Meanwhile, θ2 accounts for field-enhanced interface-related scattering processes, particularly under higher transverse electric fields, with its onset shift captured by the term ΔVT. It should be noted that, unlike conventional silicon MOSFETs, the atomically smooth van der Waals lattice of TMDs does not intrinsically exhibit surface roughness. Instead, θ2 captures additional scattering mechanisms arising at the channel–dielectric interface, such as the effects of trapped charges, local interface inhomogeneities, or remote phonon interactions under strong gate fields. Therefore, when applying the Y-function method, the attenuation factors θ1 and θ2 should be interpreted as effective empirical parameters that represent the dominant but overlapping scattering contributions under different gate field conditions. These factors do not strictly isolate individual scattering mechanisms but rather capture their combined influence. Coulomb scattering, while significant at low gate biases, is assumed to be effectively screened in the ON-state where the channel is fully conducting, and thus is not explicitly modeled. Additionally, the Y-function method is based on the drift-diffusion transport framework, and its validity is confined to regimes where carrier transport can be accurately described by drift and diffusion processes. Consequently, by extracting and analyzing these mobility parameters (µ0, θ1, θ2, and ΔVT), the Y-function method provides a comprehensive understanding of the physical mechanisms that influence mobility in 2D FETs. This semi-empirical analysis is critical for optimizing device performance and reliably interpreting the experimental data.

This Y-function method has been advanced significantly, enabling a more precise extraction of mobility parameters. Its basic variant15, which operates under the assumption that θ2 = 0, allows extraction of only µ0​ and θ1​ (Supporting Note 1.2). However, this basic method is applicable only to FETs, where field-enhanced interface-related scattering processes are negligible. To overcome this limitation, more refined variants, including the direct18 and Y-Φ methods19, have been introduced to additionally account for θ2 (Supporting Notes 1.3 and 1.4). The most sophisticated variant, the polynomial method20, can extract all relevant mobility parameters through an iterative process (Supporting Note 1.5). To provide a clearer comparison of these mobility extraction methods, Table S3 summarizes their respective advantages, limitations, and suitable application conditions. This comparative overview will assist researchers in selecting an appropriate methodology based on device characteristics and measurement environments.

Despite these recent advancements, previous studies analyzing the mobility parameters of 2D FETs (Supporting Table S2) have exclusively employed the basic method, which is inherently unsuitable for 2D FETs because of the ultrathin nature of 2D materials. In these materials, the transverse electric field is intrinsically strong and is further intensified by high-k dielectrics or hexagonal boron nitride (h-BN) gate dielectrics, thereby exacerbating field-enhanced interface-related scattering. Consequently, neglecting θ2 in these analyses introduces significant uncertainty in the extracted mobility parameters of 2D FETs.

Results and discussions

MoS2 fets and their characterization

Figure 1a presents schematics and optical microscope images of MoS2 FETs configured with both BG and TG structures. Both device architectures feature a gate length and channel width of 2 μm and 4.5 μm, respectively. The key distinction between these configurations lies in their gate dielectric layers: in the BG-FET, the underlying 300 nm-thick SiO2 serves as the gate dielectric, whereas in the TG-FET, a 15 nm-thick Al2O3 layer deposited on top of the MoS2 functions as the dielectric. Figure 1b shows the thickness measurements of each layer as determined using atomic force microscopy (AFM). Both the BG-FET and TG-FET were fabricated from MoS2 flakes confirmed by AFM to have an identical thickness of 6.9 nm (approximately 10–11 layers), ensuring that any thickness-related variation in mobility extraction is minimized. Owing to the substantial difference in the dielectric thickness—300 nm for SiO2 in the BG-FET versus 15 nm for Al2O3 in the TG-FET—the TG-FET was expected to experience a stronger transverse electric field, potentially leading to enhanced field-enhanced interface-related scattering.

Fig. 1
figure 1

MoS2 FETs and measurement setup. (a) Schematic representation of BG-FET and TG-FET, along with optical microscope images of the fabricated devices. (b) AFM measurements of MoS2 and Al2O3 layer thicknesses. (c) Schematic of the measurement setup used for the MPIV method. (d) Transfer characteristics of the BG-FET measured using a conventional SMU under vacuum conditions. (e) Transfer characteristics of the BG-FET measured using the MPIV method, demonstrating hysteresis suppression and reduced bias stress effects.

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Device characterization was performed using the multiple pulsed current–voltage (MPIV) method (Fig. 1c)21. In this setup, a pulse generator unit (PGU) applies VG and VD pulses with duration tp, whereas a current waveform analyzer (CWA) captures the resulting drain current (ID) through the source electrode in real time. This technique minimizes the measurement-induced degradation by reducing the gate biasing period, thereby preserving the intrinsic electrical characteristics of the device. Notably, when the transfer characteristics of the BG-FET were measured using only a source measurement unit (SMU) under a DC bias, clockwise hysteresis was observed even under vacuum conditions (Fig. 1d). This was possibly a result of DC bias-induced stress. In contrast, the MPIV method, with tp = 1 µs, eliminated hysteresis effects (Fig. 1e), indicating its effectiveness in mitigating bias stress. Although the MPIV method is limited by the noise bandwidth of the CWA, which prevents the measurement of ID below 1 nA, it does not affect the extraction of mobility parameters via the Y-function method, which relies only on data from the ON-state region. Consequently, all subsequent analyses presented in this paper were conducted using the MPIV method.

Mobility parameters in BG-FET

In this section, we analyze the mobility parameters of the BG-FET extracted using both basic15 and polynomial20 Y-function methods. The basic Y-function method begins with the simplest drain current model, given by

$${I_D}={G_m}\frac{{{V_{Gt}}}}{{1+{\theta _1}{V_{Gt}}}}$$
(5)

The Y-function was constructed by applying Eq. (3) to the transfer characteristics shown in Fig. 1e. Figure 2a shows the Y-function as a function of VG, where the slope and x-axis intercept correspond to Gm and VT, respectively. However, owing to the nonlinearity of the Y-function, significant uncertainties arise when extracting Gm and VT because the accuracy of linear regression depends heavily on the selected VG range. Consequently, the basic Y-function method exhibited high sensitivity to the chosen VG range, leading to inconsistencies in the previously reported mobility parameters, as summarized in Table S2. These discrepancies complicated the comparison of the mobility values across different studies and hindered the development of standardized performance benchmarks for 2D FETs. For our BG-FET, when the VG range was arbitrarily set to 40–50 V for linear regression, the extracted values for Gm, µ0, θ1, and VT were 1.24 × 10− 8 A/V, 0.31 cm2V-1s-1, -0.015, and 21.05 V, respectively. Detailed derivations of these values are provided in Supporting Note 1.2.

Fig. 2
figure 2

Limitations of the basic Y-function method. (a) Use of the basic Y-function to calculate the VG of the BG-FET. The extracted parameters exhibit strong dependence on the chosen VG​ range, leading to inaccuracies. (b) Simulated and measured ID and gm characteristics based on parameters extracted using the basic method. The simulated gm deviates significantly from experimental data, highlighting the inability of this method to account for mobility degradation effects.

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Notably, according to Eq. (4), a negative θ1 implies that the mobility is increased with increasing VGt. Three potential physical mechanisms may account for this negative θ1​. The first mechanism is the field-induced screening effect. 2D materials, owing to their atomically thin nature, exhibit a charge density that is more directly influenced by the gate field than bulk silicon22. As the gate voltage increases, free electrons accumulate in the conduction band, promoting electron–electron interaction. This interaction leads to electric field screening, which can reduce Coulomb scattering at high gate voltages and increase mobility, potentially resulting in a negative θ123. The second mechanism is the trap-filling effect. The interface trap states between the 2D material and the gate dielectric can significantly influence the carrier mobility24. At low gate voltages, these traps capture free electrons and reduce their mobility. However, as the gate voltage increases, these traps become filled, decreasing scattering and enhancing mobility, which can contribute to a negative θ125. The third potential mechanism is comprised of band-structure modifications. As the gate field increases, the band structure of the 2D material may undergo changes such as band bending. This effect can lower the conduction band minimum and reduce the effective mass of charge carriers, leading to enhanced mobility26. Thus, it can be succinctly summarized that the interplay of field-induced screening, trap-filling effects, and band structure modifications underlies the negative θ1 observed in the BG-FET.

To validate the extracted parameters, we substituted them into the drain current model (Eq. (5)) to simulate the transfer characteristics and calculated the coefficient of determination (R2 to assess the agreement between the measured and simulated data. Figure 2b plots the measured and simulated ID and gm characteristics based on the parameters extracted using the basic Y-function method. For VG values above VT, the simulated ID characteristics closely matched the measured data, with an R2 value of 0.9990. However, the simulated gm exhibited a notable discrepancy from the measured data, resulting in a lower R2 value of 0.9626. This deviation suggests that the basic Y-function method does not accurately capture the mobility parameters.

Next, we employed the polynomial Y-function method, which is detailed in Supporting Note 1.5, to extract these mobility parameters. It begins with a more complex drain-current model expressed as

$${I_D}={G_m}\frac{{{V_{Gt}}}}{{1+{\Theta _1}{V_{Gt}}+{\Theta _2}{V_{Gt}}^{2}}}$$
(6)
$${\Theta _1}=\frac{{{\theta _1} - 2{\theta _2}\Delta {V_T}}}{{1+{\theta _2}\Delta {V_T}^{2}}},{\text{ }}{\Theta _2}=\frac{{{\theta _2}}}{{1+{\theta _2}\Delta {V_T}^{2}}}$$
(7)

The polynomial method leverages a recursive algorithm, in which the parameters are iteratively refined until convergence, thereby reducing the sensitivity to the selected VG range and ensuring a more consistent extraction of the mobility parameters. The recursive process begins with an initial estimate VT*, which differs from actual VT by an error, ε = VT* − VT. A new function ξ = 1/Y2 is defined, which becomes a polynomial function of 1/VGt* (Equation (S27)). At each iteration step i, a polynomial regression is performed on ξ in terms of 1/VGt*, yielding an updated error term εi. The threshold voltage estimate is subsequently refined as VT, i+1* = VT, i* − εi. This iterative refinement continues until VT, i* converges, yielding a precisely determined VT​ and, consequently, the mobility parameters.

Figure 3a illustrates the evolution of VT, i over five iterations, beginning with an initial estimate of VT,0* = 21.05 V, obtained via the basic Y-function method. Convergence was achieved with a minimal error after five iterations, yielding a final VT of 11.32 V, which differed significantly from the results of the basic method. Subsequent extraction steps detailed in Supporting Note 1.5 yielded the refined mobility parameters: Gm = 4.38 × 10− 8 A/V, µ0 = 0.11 cm2V-1s-1, θ1 = − 0.022, θ2 = 0.000253, and ΔVT = 0 V. Notably, the values of θ2​ and ΔVT​ are remarkably small, indicating that the BG-FET, which features a thick 300 nm gate dielectric, does not generate a strong transverse electric field. Consequently, mobility degradation due to field-enhanced interface-related scattering was minimal. Unlike the basic method, the polynomial method accurately extracted θ2​, enabling precise identification of the mechanisms contributing to mobility degradation. To further validate these extracted parameters, they were substituted into the drain-current model (Eq. (6)) to simulate the ID and gm characteristics. The resulting simulations closely matched the measured data, as shown in Fig. 3b, with R2 values of 0.9997 and 0.9899, respectively, surpassing the accuracy achieved using the basic method. Thus, the polynomial Y-function method enables a significantly more accurate extraction of the mobility parameters than the basic method.

Fig. 3
figure 3

Advantages of the polynomial Y-function method. (a) Iterative refinement of VT estimation using the polynomial Y-function method. The convergence process significantly reduces extraction uncertainty, enabling more accurate extraction of VT and other mobility parameters. (b) Simulated and measured ID and gm characteristics based on parameters extracted using the polynomial method. The close agreement between simulated and experimental data demonstrates the superior accuracy of the polynomial method compared to the basic method.

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Mobility parameters in TG-FET

Finally, we applied both the basic and polynomial Y-function methods to extract the mobility parameters of the TG-FET, following the procedure outlined in Sect. Mobility parameters in BG-FET. Figure 4a presents the results obtained using the basic method. When the extracted parameters were used to simulate the ID​ and gm characteristics, a significant discrepancy was observed between the simulated and measured data. This deviation was caused by the inherent limitations of the basic method, which does not account for additional scattering mechanisms in the TG-FET, such as field-enhanced interface-related scattering. In particular, the gm​ characteristics exhibited poor agreement, with an R2 value of only 0.5835. This result indicates that the basic Y-function method, which relies solely on θ1, fails to accurately capture the peak behavior of gm​. Consequently, the omission of the key scattering effects leads to an inadequate representation of the actual device behavior.

Fig. 4
figure 4

Comparison of mobility extraction methods in TG-FET. (a) Simulated and measured ID and gm characteristics obtained using the basic Y-function method. The basic approach fails to capture the gm peak behavior, resulting in a poor coefficient of determination (R2 = 0.5835). (b) Simulated and measured ID and gm characteristics using the polynomial Y-function method. The polynomial approach accurately reproduces both ID and gm characteristics, revealing the influence of field-enhanced interface-related scattering in the 15 nm Al2O3 gate dielectric.

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In contrast, Fig. 4b presents the results obtained using the polynomial Y-function method, which accurately reproduced both the ID​ and gm​ characteristics with high precision. Notably, compared to the BG-FET (Fig. 3b), the TG-FET exhibits significantly larger extracted values of θ2​ and ΔVT. These increases are attributed to the thinner 15 nm Al2O3 gate insulator in the TG-FET, which induces a stronger transverse electric field. The intensified field-enhanced interface-related scattering processe, leading to a more pronounced mobility degradation, as reflected in the increased values of θ2​ and ΔVT​. A direct comparison of the extracted mobility parameters between the BG and TG devices reveals distinct differences in transport behavior. Although the TG-FET demonstrates a higher µ0 compared to the BG-FET, it also exhibits substantially greater field-enhanced interface-related scattering, as indicated by the increased θ2 and ΔVT. This suggests that, while the TG configuration initially benefits from improved channel electrostatics due to the thin top-gate dielectric, it suffers from enhanced surface scattering at higher gate fields. Consequently, carrier transport in the TG-FET undergoes more severe mobility degradation in the On-state region, underscoring the critical role of dielectric engineering in optimizing 2D FET performance. This detailed decomposition of mobility degradation mechanisms has not been fully addressed in previous studies, highlighting the unique capability of the polynomial method to capture these effects with greater accuracy. By enabling a more comprehensive analysis of the scattering mechanisms influencing mobility, the polynomial Y-function method represents a significant advancement over conventional approaches and offers deeper insights into the physical properties that govern 2D FET performance.

Conclusion

This study presents an advanced polynomial Y-function methodology for accurately extracting mobility parameters in 2D FETs, addressing key limitations of conventional approaches. Through a systematic analysis of MoS₂ FETs with both BG and TG configurations, we demonstrated that the proposed method enables precise identification of threshold voltages and mobility degradation factors, including field-enhanced interface-related scattering and Coulombic interactions. Furthermore, this methodology can be extended to other 2D materials such as WSe2, WS2, and MoTe2, broadening its applicability and reinforcing its generalizability in the study of 2D FETs. These findings highlight the significant influence of dielectric thickness on carrier mobility, with TG-FETs exhibiting enhanced scattering due to stronger transverse electric fields. The polynomial Y-function approach establishes a refined analytical framework that minimizes extraction uncertainties and provides deeper insight into the physical mechanisms governing charge transport in 2D FETs. In addition to improving extraction precision and mitigating series resistance effects, the method offers a standardized benchmark for mobility characterization, ensuring more reliable and consistent performance evaluations across diverse device architectures. However, it should be noted that the applicability of the polynomial Y-function method to ultra-scaled or near-ballistic 2D FETs remains an open question. In such cases, additional quantum corrections or alternative transport models may be required to maintain extraction accuracy, as discussed in Supporting Note 1.6.

Future research should extend this methodology to other TMD materials to further investigate their distinct mobility degradation mechanisms. In parallel, exploring advanced gate dielectric engineering strategies, such as high-k dielectrics and multilayer dielectric stacks, could enhance 2D FET performance toward realizing high-speed and low-power nanoelectronic applications. Furthermore, while the proposed polynomial Y-function method is applicable to both monolayer and multilayer MoS2 FETs within the drift-diffusion transport framework, additional physical effects—such as enhanced Coulomb scattering and quantum confinement—may become significant in monolayer devices, particularly at low gate biases. Future studies could refine the methodology by explicitly incorporating these effects, thereby extending its applicability to a broader range of ultra-scaled or quantum-confined 2D FETs.

In addition, it should be emphasized that the extracted mobility parameters (µ0, θ1, and θ2) inherently depend on the intrinsic properties of the specific 2D material being investigated. For instance, the low-field mobility µ0 is fundamentally determined by the carrier effective mass and the strength of intrinsic phonon scattering, both of which differ among various transition metal dichalcogenides (TMDs) such as WSe2 and MoTe2. Likewise, the attenuation factor θ1 mainly reflects phonon-limited scattering and residual Coulomb interactions, which are influenced by the characteristic phonon modes and dielectric screening capability of the material. The θ2 parameter, which describes additional mobility degradation under higher transverse electric fields, can be significantly affected by the dielectric interface quality, chemical stability of the TMD, and the type of gate insulator or encapsulation used. Therefore, while the polynomial Y-function method provides a generalized framework for mobility extraction in 2D FETs, the absolute values and relative significance of these parameters should always be interpreted in the context of each TMD’s unique electronic structure, phonon characteristics, and interface conditions. Benchmarking the extracted results against well-established theoretical and experimental data for each material is essential to ensure reliable mobility characterization when applying this approach to other emerging 2D semiconductors.

Methods

Fabrication of BG-FET

The BG-FET was fabricated on a heavily n-doped Si wafer (resistivity < 0.005 Ω∙cm), which served as the BG electrode. A 300 nm-thick silicon dioxide (SiO2) layer was grown on the Si wafer via thermal oxidation. Thin MoS₂ flakes were mechanically exfoliated from bulk MoS2 (HQ Graphene) using the Scotch tape method and subsequently transferred onto the Si/SiO2 substrate via a dry transfer technique using a polydimethylsiloxane (PDMS) stamp. The source and drain electrodes were then patterned using electron-beam lithography, followed by the deposition of Cr/Au (10 nm/50 nm) via thermal evaporation. The lift-off process was performed by immersing the devices in acetone and methanol (CH3OH) for 3–4 h to remove the resist and finalize the electrode patterning.

Fabrication of TG-FET

Following BG-FET fabrication, a 15-nm-thick aluminum oxide (Al2O3) film, which is a gate dielectric layer, was grown via atomic layer deposition (Nano-ALD2000, IPS) at 350 °C. Electron beam lithography was then performed to define the top-gate electrode region on the Al2O3 layer, followed by the deposition of Cr/Au (10 nm/100 nm) via thermal evaporation. A second liftoff process was conducted to complete the TG-FET fabrication.