Advanced control scheme for harmonic mitigation and performance improvement in DC-AC microgrid with parallel voltage source inverter

Abstract

This article proposes a finite set model predictive control (FS-MPC) strategy for a three-phase, two-stage photovoltaic (PV) and battery-based hybrid microgrid (HMG) system. The system incorporates parallel inverters with dual DC-link capacitors connected to a shared DC grid, enabling enhanced reliability and efficient power-sharing. A discrete-time HMG model is developed to predict key system parameters such as grid, circulating, and offset currents. To reduce computational complexity, the FS-MPC selectively employs 30 out of 64 switching vectors, ensuring faster processing without sacrificing performance. The system integrates an incremental conductance-based maximum power algorithm (IC-MPA) to achieve efficient PV energy extraction and a bidirectional converter model to regulate battery charging/discharging operations, maintaining DC-link voltage stability. A centralized energy management technique (CEMT) is also introduced to optimize energy flow and enhance system performance. The proposed approach is validated through comprehensive software simulations and hardware experiments, demonstrating significant improvements in power quality (PQ) and reliability (PR) under dynamic conditions. Key contributions include enhanced harmonic compensation, frequency instability mitigation, and faster response times, highlighting the practical effectiveness of the system in real-time hybrid microgrid applications.

Introduction

The reliance on fossil fuels for power generation has led to significant environmental degradation through the emission of greenhouse gases¹. In response, green energy alternatives like PV systems have gained prominence, enabling consumers to generate electricity locally. The integration of smart meters has further enhanced this process, allowing for bidirectional power exchange between consumers and the grid, where excess PV-generated energy can be fed back to the grid in exchange for incentives². However, challenges persist, particularly the relatively low efficiency of PV cells, which necessitates the use of high-efficiency converters to optimize power extraction from PV arrays. Standards to address these challenges are well-established³, providing solutions for both single-stage⁴ and two-stage⁵ operations.

For higher DC-link voltages, single-stage converters generally outperform two-stage converters in efficiency⁶. However, comparative studies^4,5,6 have demonstrated that, while unidirectional operation offers simplicity, two-stage systems provide greater design flexibility, enhanced stability, and improved controller performance. Moreover, the integration of hybrid AC/DC microgrids^7,8 further supports efficient energy management through coordinated control strategies and seamless energy exchange between AC and DC subsystems. These systems are particularly advantageous in accommodating renewable energy sources and battery storage⁹, which ensure a continuous power supply during grid outages. Additionally, the use of bidirectional converters in hybrid AC/DC microgrids¹⁰ enables efficient charging and discharging operations, supporting the reliability and stability of the power system. Therefore, this study adopts a two-stage PV integration strategy with bidirectional converter operation within a hybrid AC/DC microgrid framework. This approach leverages the advantages of two-stage converters, maximizing power extraction, improving operational flexibility, and enhancing overall system efficiency and stability.

Modern advancements in power electronics have enhanced the efficiency of electrical systems but introduced challenges with harmonic currents from nonlinear loads, impacting PQ¹¹. To address these issues, researchers are participating in defensive study, focusing on power filters such as passive, active, and hybrid, to mitigate grid disturbances. Although passive filters were initially popular for their simplicity, limitations like resonance and bulky design have reduced their viability¹². As a result, active power filters (APFs), particularly shunt APFs (SAPFs), have emerged as a more effective solution, compensating for harmonic disturbances with sinusoidal, distortion-free grid currents^13,14. Various topologies, including conventional three-phase inverters, parallel inverters, and multilevel designs, have been explored. However, the conventional three-phase topology with a single DC-link struggles with filtering circulating and offset currents¹⁵.

Moreover, multilevel inverters, although effective, are less practical due to excessive switching losses and design complexity. The two dc-link topology offers the benefit of eliminating circulating currents, making it more effective than the single DC-link configuration in SAPF systems. The two DC-link inverter topology is a more suitable option, as it addresses these limitations. According to¹⁶, this configuration reduces the capacitance requirement of each DC-link to half that of the conventional single dc-link setup, thanks to the power balancing between the parallel converters. Therefore, the two dc-link topologies are selected for their ability to offer better current filtration and improved performance without significant increases in system losses.

Various control methods can be utilized for SAPF, such as hysteresis band, dead-beat control, synchronous reference frame (SRF based FCS-MPC) theory, instantaneous reactive power theory, feedforward control, and artificial intelligence techniques, among others^17,18. Despite the effectiveness of these techniques, certain challenges may still arise, such as variations in the frequency modulation index regulation, resonance issues, and reactive power complications specifically hysteresis band controller application¹⁹. Various methods in both the frequency and time domains are also proposed for similar applications. Frequency-domain methods like the empirical mode decomposition, Hilbert transform, multi-resolution analysis, and Fourier series analysis have been extensively studied^20,21. However, due to the one-cycle delay, these techniques can introduce computational complexity, require significant processing power, and may be less effective for non-linear signals. To tackle the shortcomings, different time domain methods such as recursive least square, droop control, Kalman filtering, extended Kalman filtering and model predictive control (MPC) is applied, which are suitable for real-time applications^22,23,24. However, MPC offers superior performance over others by optimizing control actions based on future predictions.

Since achieving a high-quality dynamic response and performance is challenging for traditional control methods, the proposed solution is to employ FS-MPC²⁵. FS-MPC involves predicting future states of the system based on a finite set of possible control actions and optimizing the control input in real-time to minimize a cost function over a prediction horizon. FS-MPC has gained popularity in recent decades due to its enhanced performance, including improved dynamic responses, independence from modulation algorithms, and straightforward incorporation of nonlinearities²⁶.

Recent advancements in predictive control strategies have significantly enhanced the performance of power converters, but limitations in robustness and adaptability highlight areas requiring further modification. For example, SRF based FCS-MPC-based finite control-set predictive control (SRF based FCS-MPC based FCS-MPC)²⁷ has shown effective performance in steady-state conditions; however, its reliance on precise model parameters limits its adaptability to dynamic scenarios such as load fluctuations. Similarly, the ultra-local model-free predictive control for T-Type grid-connected converters²⁸, which uses sliding-mode disturbance observers, improves robustness against uncertainties but struggles with increased computational complexity in real-time applications. Furthermore, the reinforcement learning-based predictive control for voltage source inverters²⁹ demonstrates promising self-learning capabilities; however, its performance heavily depends on extensive training data, making it challenging to implement in rapidly changing environments. Therefore, there is a requirement to modify the traditional FCS-MPC approach for real microgrid applications.

Comparison

In Table 1, a comparative analysis table by emphasizing the advantages of the proposed approach as compared to the traditional approaches are illustrated.

Table 1 Comparative table emphasizing FS-MPC merits.

Motivation and background

The practical significance of the theoretical advancements presented in this study lies in their potential to address critical challenges in integration of renewable energy and PQ improvement. The wide adoption of PV systems and SAPFs necessitates innovative control strategies to optimize performance, reduce computational burden, and ensure reliability in real-time applications.

• 1. Enhanced dynamic performance Achieving high-quality dynamic responses is crucial for both PV integration and SAPF systems. Traditional control methods, though effective to some extent, often fail to provide the desired performance under varying operating conditions.

• 2. Computational efficiency Many simplified control strategies focus on reducing computational complexity but often compromise system performance. There is a need for methods that strike a balance between efficiency and performance.

• 3. Incorporation of nonlinearities The increasing complexity of modern electrical systems, with nonlinearities and dynamic behaviors, demands control strategies that can adapt and optimize in real time without relying on extensive parameter tuning or modulation algorithms.

Advances in Model Predictive Control: FS-MPC offers significant advantages by predicting system states and optimizing control actions in real time. It ensures better dynamic response, improved harmonic compensation, and reduced reliance on modulation techniques, making it a superior choice for SAPF and PV applications.

Contribution

The major contribution of the study is highlighted below.

• 1. Development of an FS-MPC strategy Introduced a FS-MPC strategy tailored for a three-phase, two-stage PV-battery based DC-AC HMG system. Achieved computational efficiency by selecting 30 out of 64 possible switching vectors. The integration of FS-MPC with dual DC-link parallel inverters enhances the system’s performance, particularly in harmonic compensation and power balancing under non-linear load conditions.

• 2. Bidirectional converter model and CEMT Developed a comprehensive bidirectional converter model along with a CEMT. This approach ensures effective maintenance of DC-link voltage and overall system stability by regulating the battery charging and discharging operation.

• 3. Laboratory setup compliance Implemented a laboratory setup for the DC-AC HMG approach that adheres to key standards, including IEEE 519–2014 for PQ enhancement, ENE30 for photovoltaic array performance, and IEEE 1547–2018 for grid-connected HMG operation.

The article is structured as follows: Section “Parallel inverter based HMG framework” introduces the proposed parallel-inverter-based HMG system. Section “Bidirectional converter modeling and centralized energy management techniques” details bidirectional converter modeling and CEMT for dc-link voltage regulation and efficient charge/discharge operations. Section “Inverter modeling and circulatingcurrent estimation” covers circulating and offset current estimation. Section “FS-MPC based inverter controlstrategy” outlines the FS-MPC-based parallel inverter control and pulse generation. Section “Result analysis” presents case studies with software and hardware validations. Finally, Section “Conclusion” concludes the study.

Parallel inverter based HMG framework

In this study, a PV-battery-based HMG system is developed, incorporating two DC-AC grids. To extract a maximum power of 100 kW, the IC-MPA is used to regulate the duty cycle of the boost converter, as illustrated in Fig. 1. An 80-kW battery is employed to manage power fluctuations. A bidirectional converter, capable of operating in both buck and boost modes, is implemented to optimize charging, and discharging operations. Additionally, a non-linear load with a capacity of 100 kW and 10 kVar is integrated into the AC grid to evaluate the system’s PQ.

Fig. 1

Two parallel interleaved inverter-based DC-AC HMG system.

A key feature of this system design is the use of two parallel inverters for DC-AC power conversion, instead of a single inverter, as shown in Fig. 1. This configuration employs two separate DC-link voltages, which helps to eliminate circulating currents and delivers improved performance compared to a single DC-link voltage setup. This design ensures continuous power supply even in the event of a failure in one of the inverter modules. Furthermore, due to the SAPF operation, the system significantly reduces harmonic distortion compared to conventional approaches.

The effectiveness of the proposed system is validated through both software simulations and hardware testing. A scaled-down version of the model is developed and tested on a hardware platform, with the proposed controller implemented on a Spartan-6 FPGA to operate the developed HMG test bench.

Bidirectional converter modeling and centralized energy management techniques

This section provides a detailed analysis of the storage system modeling, ensuring enhanced controller stability. Additionally, a CEMT is developed to improve charging and discharging capabilities.

Storage modeling and controller stability

To manage the DC-side voltage of the inverters (VSI-1 and VSI-2) in HMGs, a bidirectional buck-boost converter is integrated as illustrated in Fig. 1. This converter operates in two modes: buck mode, where it steps down the voltage when switch M_b2 is active, and boost mode, where it steps up the voltage when switch M_b1 is active. Consequently, the battery undergoes charging in buck mode and discharging in boost mode. Considering the main switch M_b1 in Fig. 1, the large signal modeling of the boost converter is illustrated in Fig. 2a,b. Figure 2a illustrates that at M_b1 = 1, the battery inductor (L) stores power, and at M_b1 = 0, L discharges the power to the battery.

Fig. 2

DC-DC boost converter: (a) M_b1 is on (b) M_b1 is off.

The large signal model can be derived as.

$$L\frac{{dI_{b} }}{dt} = V_{b} - (1 - D_{a} )V_{dc}$$

(1)

$$C_{dc} \frac{{dV_{dc} }}{dt} = (1 - D_{a} )I_{b} - \frac{{V_{dc} }}{{R_{dc} }}$$

(2)

Here L, $I_{b}$ and $V_{b}$ is the battery inductor, current and voltage, $D_{a}$ is the duty ratio of the converter, $C_{dc}$,$R_{dc}$, and $V_{dc}$ is the dc-link capacitance, resistance and voltage of the inverter. For the converter operation, the development of a cascaded controller is required. Considering the perturbation disturbances in battery current, dc-link voltage and duty ratio of the converter ($I_{bd}$,$V_{dc,d}$ and $D_{d}$), the small signal modeling of the cascaded controller is derived as.

$$\frac{{d\left( {I_{b} + I_{bd} } \right)}}{dt} = \frac{{V_{b} }}{L} - \frac{{\left( {V_{dc} + V_{dc,d} } \right)}}{L}\left( {1 - \left( {D_{a} + D_{d} } \right)} \right)$$

(3)

$$\frac{{d\left( {V_{dc} + V_{dc,d} } \right)}}{dt} = - \frac{{\left( {V_{dc} + V_{dc,d} } \right)}}{{C_{dc} R_{dc} }} + \frac{{\left( {I_{b} + I_{b,d} } \right)}}{{C_{dc} }}\left( {\left( {D_{a} + D_{d} } \right)} \right)$$

(4)

The detailed analysis regarding the cascaded current controller is extensively presented in²³. Figure 3 illustrates the cascaded controller, where the obtained DC voltage ($V_{dc}$) from PV is compared with the reference DC voltage ($V_{dcr}$) and the residue ($EV_{dc}$) is compensated by the PI controller to extract the reference battery current component ($I_{br}$).$I_{br}$ is further compared to the actual $I_{b}$ and the residue ($EI_{b}$) is passed through the PI controller. This is further used to compute the duty of the converter through the PWM technique by switching the converter switches (M_b1 and M_b2) in a complementary manner. The simultaneous turned-on and off conditions are avoided. By eliminating the perturbation disturbances in (2–3), the Laplace transformation of outer voltage and inner current loop are computed as.

$$G_{o} (s) = \frac{{R_{dc} (1 - D_{a} )^{2} - sL}}{{(1 - D_{a} )(sC_{dc} R_{dc} + 2)}}$$

(5)

$$G_{i} (s) = \frac{{V_{dc} (sC_{dc} R_{dc} + 2)}}{{s^{2} R_{dc} LC_{dc} + sL + R_{dc} (1 - D_{a} )^{2} }}$$

(6)

Fig. 3

Outer and inner loop controller for boost converter.

Considering (4) and (5), the overall inner ($L_{i} (s)$) and outer loop ($L_{o} (s)$) transfer function can be derived as

$$L_{i} (s) = \frac{{G_{i} (s)}}{{V_{p} }}\left( {K_{pi} + \frac{{K_{ii} }}{s}} \right)$$

(7)

$$L_{o} (s) = G_{o} (s)(K_{po} + \frac{{K_{io} }}{s})L_{t} (s) \, \left( {\because L_{t} (s) = \frac{{L_{i} (s)}}{{1 + L_{i} (s)}}} \right)$$

(8)

Here, ($K_{pi}$, $K_{ii}$) and ($K_{po}$, $K_{io}$) are the PI gains of inner and outer loop transfer functions. $V_{p}$ is the PWM gain, which is set at 1.

Control scheme illustrated in Fig. 3, is tuned using MATLAB/Simulink’s "Control System Tuner" tool for both inner and outer loop controllers. Two specific tuning goals are established: the inner loop focuses on enhancing disturbance rejection by setting a target bandwidth using "TuningGoal.LoopShape." This allows for quicker responses to disturbances. Meanwhile, the outer loop is geared towards tracking the reference voltage and ensuring stability, with a lower bandwidth to handle slower, system-level responses. Stability margins like phase margin and gain margin are set using "TuningGoal.Margins." To simplify tuning and prevent interactions between loops, the outer loop is considered open during inner loop tuning. The inner loop is operated at $60^\circ$ phase margin, 3 dB gain margin, and 30,000 to 300,000 rad/s higher bandwidth. Similarly, the outer loop is operated at the same phase and gain margin. However, it is operated at 3000 to 30,000 rad/s lower bandwidth.

To initiate the tuning process, a “systuneOptions” object is created, with settings adjusted to optimize results for high-bandwidth loop shapes. After running the tuning process, the results show that while the hard constraint achieved a value of 1.7014 over 70 iterations, the soft constraint was not satisfied. However, achieving a hard constraint value of 1.7014 indicates that the tuning process successfully addressed critical performance and stability requirements, albeit not achieving all desired objectives. To visualize the system’s performance against tuning goals, the “viewGoal” function generates loop shape and stability plots as shown in Fig. 4a,b. Although the tuned result slightly deviates from the specified target bandwidth and phase margin, it ensures stable operation.

Fig. 4

Outer and inner controller stability: (a) Loop shape response (b) Bode response.

Finally, controller gains from tunable blocks are retrieved and saved to the workspace. For the inner loop controller, the tuned values are a proportional gain of 0.1387 and an integral gain of 1867.6. For the outer loop controller, the tuned values are a proportional gain of 0.2202 and an integral gain of 604.6026. These gains ensure stable and effective performance, despite not fully meeting the tuning goals.

Energy management

Despite the modeling and control design, regulating the charging /discharging operation is important. Therefore, a CEMT is proposed to regulate the SOC and dc-link voltage as illustrated in Fig. 5. To enhance battery life, lower ($SOC_{L}$) and higher limits ($SOC_{H}$) of SOC at 10% and 90%. From^29,30, the actual ($V_{dc,a}$) can be computed as.

$$V_{dc,a} \ge V_{pp} \frac{2\sqrt 2 }{{\sqrt 3 m}}$$

(9)

Fig. 5

Centralized energy management technique (CEMT).

Here, V_pp is the phase voltage, and ‘m’ is the modulation index of the inverter. Considering (9), V_dc,a is computed as 375.57 V. Looking at V_dc,a, the lower ($V_{dc,L}$) and higher ($V_{dc,H}$) limit of $V_{dc}$ is decided as 300–500 V. The steps related to CEMT are presented below.

Step 1: Sense the actual $V_{dc}$ and SOC.

Step 2: If $SOC_{L} \le SOC \le SOC_{H}$.

then $\left\{ {\begin{array}{*{20}c} {Yes,{\text{ goto Step - 4}}} \\ {No,{\text{ goto Step - 3}}} \\ \end{array} } \right.$

Step3: If $SOC\rangle SOC_{H}$.

then $\left\{ {\begin{array}{*{20}c} {Yes,{\text{ standby battery}}(Discharge)} \\ {No,{\text{ SOC}}\langle {\text{SOC}}_{L} {\text{(Charge}})} \\ \end{array} } \right.$

Step 4: If $V_{dc,L} \le V_{dc} \le V_{dc,H}$.

then $\left\{ {\begin{array}{*{20}c} {Yes, \, standby \, battery({\text{Charge/}}Discharge)} \\ {No,{\text{ goto Step - 5 }}} \\ \end{array} } \right.$

Step 5: If $V_{dc} \rangle V_{dc,H}$.

then $\left\{ {\begin{array}{*{20}c} {Yes,{\text{ Buck}}{\text{mode}} ({\text{Charge}})} \\ {No,{\text{ Boost}}{\text{mode}} (Discharge) \, } \\ \end{array} } \right.$

Inverter modeling and circulating current estimation

This section presents detailed parallel inverter modeling with the circulating current estimation.

Parallel inverter modeling

Figure 1 illustrates the HMG setup, composed of two parallel VSIs fed from one dc-grid voltage and connected to the grid by using two RL filters. The detailed modeling is as follows.

$$E_{g,t} = - r_{1} I_{i1,t} - l_{1} \frac{d}{dt}\left( {I_{i1,t} } \right) + V_{i1,t}$$

(10)

$$E_{g,t} = - r_{2} I_{i2,t} - l_{2} \frac{d}{dt}\left( {I_{i2,t} } \right) + V_{i2,t}$$

(11)

$$\left( {\because ^{\prime}r_{1} = r_{2} = r^{\prime},\;^{\prime}l_{1} = l_{2} = l^{\prime},^{\prime}\;V_{i,t} = \frac{{V_{i1,t} + V_{i2,t} }}{2}^{\prime},\;and\;^{\prime}t = a,b,c^{\prime}} \right)$$

$$I_{i,t} = I_{i1,t} + I_{i2,t}$$

(12)

$$I_{g,t} = I_{l,t} - I_{i,t}$$

(13)

Here ($r_{1}$,$r_{2}$) and ($l_{1}$,$l_{2}$) are the RL filter resistance and inductance, ($V_{i1,t}$,$V_{i2,t}$) and ($I_{i1,t}$,$I_{i2,t}$) are the VSI-1 and VSI-2 voltage and current, and ‘${\text{t}}$’ is the different phases of the undertaken system. $E_{g,t}$ and $I_{g,t}$ are the grid voltage and current, and $I_{l,t}$ is the load current. Considering (10–11), the equivalent system modeling can be derived as.

$$V_{g,t} = - \frac{r}{2}I_{i,t} - \frac{l}{2}\frac{d}{dt}\left( {I_{i,t} } \right) + V_{i,t}$$

(14)

Circulating current estimation

Due to the parallel setup, small voltage disturbances can cause power imbalance and circulating currents. Considering (10–11), the circulating current model between inverters are defined as.

$$\sum\limits_{t = a}^{c} {\left( {V_{i1,t} - V_{i2,t} } \right)} = r\sum\limits_{t = a}^{c} {\left( {I_{i1,t} - I_{i2,t} } \right)} + l\frac{d}{dt}\sum\limits_{t = a}^{c} {\left( {I_{i1,t} - I_{i2,t} } \right)}$$

(15)

The circulating current between VSI-1 and VSI-2 ($I_{o1}$ and $I_{o2}$), and total circulating current ($I_{o}$) can be obtained as.

$$I_{o1} = \frac{1}{\sqrt 3 }\sum\limits_{t = a}^{c} {\left( {I_{i1,t} } \right)} ,\;I_{o2} = \frac{1}{\sqrt 3 }\sum\limits_{t = a}^{c} {\left( {I_{i2,t} } \right)}$$

(16)

$$I_{o} = I_{o1} - I_{o2}$$

(17)

Considering (16) and (17), (15) can be modified as.

$$V_{o1} - V_{o2} = r(I_{o1} - I_{o2} ) + l\frac{d}{dt}(I_{o1} - I_{o2} )$$

(18)

$$V_{o} = r_{o} I_{o} + l\frac{d}{dt}I_{o} \, \;\;\;\left( {\because r_{o} = 2r,l_{o} = 2l,V_{o} = V_{o1} - V_{o2} } \right)$$

(19)

Based on inverter switching sequences ($S_{1,t}$ and $S_{2,t}$) and dc-link voltage, the circulating voltage $V_{o}$ can be represented as

$$V_{o} = \frac{{V_{dc} }}{\sqrt 3 }\left( {S_{1a} + S_{1b} + S_{1c} - S_{2a} - S_{2b} - S_{2c} } \right)$$

(20)

Offset current estimation

The implemented MPC explores all possible switching states achievable by combining VSI-1 and VSI-2, to forecast the behavior of the parameters for the computation of each switching state. Irrespective of the circulating current, the selection of some switching states can produce the offset current between VSI-1 and VSI-2. The offset current can be represented as.

$$I_{i1,t} = I^{\prime}_{i1,t} + I_{it} ,I_{i2,t} = I^{\prime}_{i2,t} - I_{it}$$

(21)

Here, $I^{\prime}_{i1,t}$ and $I^{\prime}_{i2,t}$ are the respective injected inverter current, which is required to eliminate the harmonics generated by the load.$I_{it}$ is the dc-component associated with $I^{\prime}_{i1,t}$ and $I^{\prime}_{i2,t}$. Applying Park’s transformation, (21) is turned to $\alpha \beta$ components.

$$I_{i1,\alpha } = I^{\prime}_{i1,\alpha } + I_{i\alpha } ,I_{i1,\beta } = I^{\prime}_{i1,\beta } + I_{i\beta }$$

(22)

$$I_{i2,\alpha } = I^{\prime}_{i2,\alpha } - I_{i\alpha } ,I_{i2,\beta } = I^{\prime}_{i2,\beta } - I_{i\beta }$$

(23)

Considering (17), if $I_{o}$ is 0, it is determined that $I_{i1,t} = I_{i2,t}$. Similarly, the relation between the VSI-1 and VSI-2 current components ($I^{\prime}_{i1,\alpha } = I^{\prime}_{i2,\alpha }$ and $I^{\prime}_{i1,\beta } = I^{\prime}_{i2,\beta }$) are computed. From (21), the offset currents can be calculated as.

$$I_{i\alpha } = \frac{{I_{i1,\alpha } - I_{i2,\beta } }}{2},\;\;\;I_{i\beta } = \frac{{I_{i1,\beta } - I_{i2,\beta } }}{2}$$

(24)

The occurrence of offset current in the system requires additional filters, which incur extra costs. Thus, it’s important to reduce the need by optimizing the cost function of the MPC.

FS-MPC based inverter control strategy

Before developing the discrete model of the HMG system, the $\alpha \beta$ components ($E_{g,\alpha \beta }$) of grid voltage ($E_{g,t}$) can be computed as.

$$E_{g,\alpha } = - rI_{i\alpha ,x} - L\frac{d}{dt}\left( {I_{i\alpha ,x} } \right) + V_{i\alpha ,x}$$

(25)

$$E_{g,\beta } = - rI_{i\beta ,x} - L\frac{d}{dt}\left( {I_{i\beta ,x} } \right) + V_{i\beta ,x}$$

(26)

Here, x represents the VSI-1 and VSI-2.

Discrete inverter modling

Due to its implicit nature, the backward Euler discretization based numerical method provides improved stability compared to the forward Euler method²⁴. This method calculates the next value using information from the current and future time steps. By using BED, the one-step $\left( {k + 1} \right)$ ahead discrete forward values of currents in (25), (26), and (19) are computed as.

$$I_{i\alpha ,x} \left( {k + 1} \right) = \frac{{lI_{i\alpha ,x} \left( k \right) + t_{s} \left[ {V_{i\alpha ,x} \left( {k + 1} \right) - E_{g\alpha } \left( {k + 1} \right)} \right]}}{{l + rt_{s} }}$$

(27)

$$I_{i\beta ,x} \left( {k + 1} \right) = \frac{{lI_{i\beta ,x} \left( k \right) + t_{s} \left[ {V_{i\beta ,x} \left( {k + 1} \right) - E_{g\beta } \left( {k + 1} \right)} \right]}}{{l + rt_{s} }}$$

(28)

$$I_{o} \left( {k + 1} \right) = \frac{{l_{o} I_{o} \left( k \right) + t_{s} V_{o} \left( {k + 1} \right)}}{{l_{o} + r_{o} t_{s} }}$$

(29)

Here,$t_{s}$ is the sampling time. To avoid unnecessary delay in practical applications, two-step ahead prediction is made by the proposed algorithm at $\left( {k + 2} \right)$ instant.

$$I_{i\alpha ,x} \left( {k + 2} \right) = \frac{{lI_{i\alpha ,x} \left( {k + 1} \right) + t_{s} \left[ {V_{i\alpha ,x} \left( {k + 2} \right) - E_{g\alpha } \left( {k + 2} \right)} \right]}}{{l + rt_{s} }}$$

(30)

$$I_{i\beta ,x} \left( {k + 2} \right) = \frac{{lI_{i\beta ,x} \left( {k + 1} \right) + t_{s} \left[ {V_{i\beta ,x} \left( {k + 2} \right) - E_{g\beta } \left( {k + 2} \right)} \right]}}{{l + rt_{s} }}$$

(31)

$$I_{o} \left( {k + 2} \right) = \frac{{l_{o} I_{o} \left( {k + 1} \right) + t_{s} V_{o} \left( {k + 2} \right)}}{{l_{o} + r_{o} t_{s} }}$$

(32)

For the proposed system operation, the $E_{g,\alpha \beta } \left( {k + 2} \right) \approx E_{g,\alpha \beta } \left( k \right)$. However, $E_{g,\alpha \beta } \left( {k + 2} \right)$ is computed by using Lagrange extrapolation³¹.

Parallel inverter control block

The complete parallel inverter control block is illustrated in Fig. 6. Figure 6 illustrates that two sub controllers such as reference current extraction and MPC block is used to compute the switching signals for parallel inverter operation.

Fig. 6

Parallel inverter control strategy.

Reference current extraction

In this proposed approach, to extract maximum active power ($P_{M}$) from the PV inputs ($P_{PV}$ and $I_{PV}$), IC-MPA is used^4,30. Further, $P_{M}$ is compared with the active load ($P_{l}$) and grid power ($P_{g}$) to compute the active power error ($P_{e}$). However, due to the variable nature of generation, the regulation of dc-link voltage is also important to extract appropriate active current components. As illustrated in Fig. 6, the generated optimum dc-link voltage ($V^{\prime}_{dc}$) from IC-MPA is compared with the actual dc-link voltage ($V^{\prime}_{dc}$), to generate the dc-link voltage error ($V_{e}$). To compute the active current component ($I_{A}$) and additional active current component ($I_{extra}$), both voltage and power error components are undergone through PI regulators. The computed I_A and I_extra components help to compute the grid active current components ($I_{g\alpha }$), which is further compared to load active current component ($I_{l\alpha }$) to compute the reference current component ($I^{\prime}_{i\alpha }$). Through park transformation, abc to $\alpha \beta$ transformation is occurred. Similarly, based upon the reactive load ($Q_{l}$) and grid power ($Q_{g}$), the reference reactive current component ($I^{\prime}_{i\beta }$) is computed. The reference currents passed to the MPC block to compute the respective switching signals for respective inverters.

FS-MPC block

Similarly, the parallel inverter model derived in (30–32) is simplified using an FS-MPC block as illustrated in Fig. 6. Accurate calculation of the circulating current requires measurement of the current from VSI-1. However, only two sensors are utilized to measure the load and VSI-2 currents. The third component of VSI-2 and load is computed as follows.

$$I_{i2,c} = - I_{i2,a} - I_{i2,b}$$

(33)

$$I_{l2,c} = - I_{l2,a} - I_{l2,b}$$

(34)

The illustrated FS-MPC block computes the inverter currents $I_{i\alpha \beta ,x} \left( {k + 2} \right)$, offset currents $I_{i\alpha \beta } (k + 2)$, and circulating currents $I_{o} \left( {k + 2} \right)$ in the two-step ahead sampling interval for each sampling voltage ($V_{i\alpha \beta ,x} \left( {k + 2} \right)$) as computed below.

$$V_{i\alpha ,x} = \sqrt{\frac{2}{3}} V_{dc} \left( {S_{xa} - \frac{{S_{xb} }}{2} - \frac{{S_{xc} }}{2}} \right)$$

(35)

$$V_{i\alpha \beta ,x} = \frac{{V_{dc} }}{\sqrt 2 }\left( {S_{xb} - S_{xc} } \right)$$

(36)

Here, $S_{xt}$ represents the switching states of VSI-1 and VSI-2. By considering, the load currents $I_{l,\alpha \beta }$ and two-step ahead predictive grid currents $I_{g,\alpha \beta } (k + 2)$, the inverter currents are computed as.

$$I_{i\alpha ,x} (k + 2) = I_{l\alpha } - I_{g,\alpha } (k + 2)$$

(37)

$$I_{i\beta ,x} (k + 2) = I_{l\beta } - I_{g,\beta } (k + 2)$$

(38)

From (24), the two-step ahead predictive $I_{i\alpha \beta } (k + 2)$ are computed as.

$$I_{i\alpha } (k + 2) = \frac{{I_{i\alpha ,1} (k + 2) - I_{i\alpha ,2} (k + 2)}}{2}$$

(39)

$$I_{i\beta } (k + 2) = \frac{{I_{i\beta ,1} (k + 2) - I_{i\beta ,2} (k + 2)}}{2}$$

(40)

By considering the reference value $I^{\prime}_{{_{i\alpha \beta } }}$ and $I_{i\alpha \beta } (k + 2)$, the cost function (c) of the MPC block is derived as.

$$c = \sqrt {c_{\alpha }^{2} + c_{\beta }^{2} + \rho_{o} c_{o}^{2} + \rho_{\alpha o} c_{\alpha o}^{2} + \rho_{\beta o} c_{\beta o}^{2} }$$

(41)

Here,$c_{\alpha } = I^{\prime}_{i\alpha } - I^{\prime}_{i\alpha } (k + 2)$,$c_{\beta } = I^{\prime}_{i\beta } - I^{\prime}_{i\beta } (k + 2)$,$c_{o} = I^{\prime}_{o} - I^{\prime}_{o} (k + 2)$,$c_{\alpha o} = I_{i\alpha }^{*} - I_{i\alpha }^{*} (k + 2)$ and $c_{\beta o} = I_{i\beta }^{*} - I_{i\beta }^{*} (k + 2)$.$\rho_{o}$,$\rho_{\alpha o}$ and $\rho_{\beta o}$ are denoted as weighing factors and allow a tradeoff between the circulating and offset $\alpha \beta$ currents.

These values are determined empirically, resulting in multi-level voltage that cancels circulating and offset currents. As shown in Fig. 7, the MPC method first detects inverter and load currents, then computes predictive currents at a (k + 2) interval to determine the switching sequences for VSI-1 and VSI-2. The sequence with the minimum error value, minimizing the cost function in (41), is selected for the next sampling instant. The SAPF configuration generates 64 switching state vectors, but 30 vectors are empirically chosen to streamline the MPC code, enhancing voltage quality, and reducing harmonics for improved PQ performance.

Fig. 7

FS-MPC Flowchart.

Result analysis

In this section, the effectiveness of the developed HMG, as shown in Fig. 1, is evaluated on both software and hardware platforms. The power restoration or PR capability of the HMG is tested under a sudden VSI failure scenario, with the results compared to traditional droop and SRF based FCS-MPC-based approaches to highlight the significance of the FS-MPC. To assess the power quality PQ aspects, the model’s performance is further tested under non-linear load conditions, with comparisons drawn against conventional methods. Additionally, for real-time hardware validation, a downscaled replica of the proposed model is implemented using a Spartan6 FPGA processor, as illustrated in Fig. 8. Detailed modeling information is provided in the Appendix (Table S1 and Table S2), and the corresponding case studies are discussed below.

Fig. 8

Hardware test bench: PV-battery HMG System with FS-MPC deployment. Each VSI Configuration: 1. Snubber Capacitor- 3, 2. SKM100GB12T4-3, 3. SkyperTM 32 pro Driver- 3,4. TLP 250 Protection board-1,5. Sensing (TL082) board-1, 6. Fault Board- 1, 7. Voltage sensor-1, 8. Outer port. PV-battery HMG with FS-MPC: 9. AC Panel, 10. Boost Converter, 11. PV Emulator, 12. Buck-Boost converter, 13.VSI-1, 14.VSI-2,15. Spartan-6 Controller,16. 3-phase sensing unit, 17. 3-phase isolation transformer, 18.DC panel,19. Non-linear Load, 20. Battery, 21-Display, 22-Monitoring.

Software validation: during sudden failure of VSI-1

As shown in Fig. 1, the FS-MPC-based HMG’s dynamic performance is analyzed during VSI-1 failure, assessing the system’s power regulation. PV generation oscillates between 100 kW, 50 kW, 75 kW, and back to 100 kW, where each phase lasting 5 s. The load’s active power demand ranges from 75 to 100 kW and back to 75 kW, while reactive power varies between 5 and 10kVar and back to 5kVar over the same period. The battery’s SOC is maintained between 10–90%. The grid absorbs 10 kW during 0–5 s and 15–20 s, and 25 kW during 10–15 s, indicating a lack of grid capacity. These power curves are shown in Fig. 9a-l.

Fig. 9

Total PV power (b) PV current (c) Duty ratio (d) Load active power (e) Load reactive power (f) battery power (g) SOC of the battery (h) Grid power (i) VSI-1 active power (j) VSI-1 reactive power (k) VSI-2 active power (l) VSI-2 reactive power.

The IC-MPA effectively tracks the maximum power by regulating the converter’s duty ratio, as shown in Fig. 8a. This regulation ensures maximum PV current and power, as illustrated in Fig. 9b,c respectively. The load’s active and reactive power curves, which vary according to the set conditions, are depicted in Fig. 9d,e. The battery power and its SOC are shown in Fig. 9e,f. The battery’s charging and discharging are determined based on grid availability and PV generation. The SOC curve in Fig. 9g shows the battery’s SOC increasing during charging and decreasing during discharging. The grid power curve is presented in Fig. 9h, indicating that during the intervals of 0-5 s and 15–20 s, the grid absorbs 10 kW, while from 10 to 15 s, it absorbs 25 kW and at 5–10 s, the grid supplies power. During the 10–15 s interval, when load demand is high and power generation is low, the battery provides an additional 60 kW, as illustrated in Fig. 9f. These results demonstrate that the detailed converter modeling and CEMT perform effectively under dynamic conditions, ensuring better energy management.

To evaluate the synchronization operation and the performance of the FS-MPC, a scenario was simulated where VSI-1 fails at 10 s. The active and reactive power results for VSI-1 and VSI-2 are depicted in Fig. 9i,l. From 0 to 10 s, both converters share equal power, delivering approximately 42.5 kW–35 kW of active power and 2.5 kVar–5 kVar of reactive power, as shown in Fig. 9i–l respectively. After the failure of VSI-1 at 10 s, the power distribution is adjusted, with the active and reactive power outputs shifting to 125 kW–85 kW and 10 kVar–5 kVar, respectively. These results demonstrate the system’s capability to manage uncertainties and maintain the required power supply to both the grid and the load, ensuring stable operation even during VSI failure.

Hardware validation: during the sudden failure of VSI-1

To validate the proposed FS-MPC based parallel inverter operation, a downscaled PV-battery-based hardware HMG model is developed by replicating the simulated model. In this test condition, the performance of HMG system and controller is verified during the sudden failure of one inverter. The battery needs 1 kW to charge during the peak generation and the SOC of the battery lies well within the lower and higher limit. Under this scenario, the outcomes of the respective factors such as generation, load, inverters, and grid are monitored and presented in Figs. 10 and 11.

Fig. 10

(a) PV generation (b) Load active power (c) Load reactive power (d) Battery power (e) VSI-1 active power (f) VSI-1 reactive power (g) VSI-2 active power (h) VSI-2 reactive power (i) Grid active power.

Fig. 11

Hardware deployment results: (a) Non-linear load current (b) Magnified load current (c) VSI-1 current (d) Magnified VSI-1 current (e) VSI-2 current (f) Magnified VSI-2 current (g) Grid current (h) Magnified grid current (i) Phase relation between voltage and current (j) Magnified phase relation (k) THD % of Load and grid current.

Figure 10a illustrates that solar generation varies from 10 kW–5 kW–7.5 kW–10 kW at the same time interval. Figure 10b,c illustrates the active and reactive load demand which varies from 7.5 kW–10 kW–10 kW–5 kW and 0.5 kVar–1 kVar–1 kVar–0.5 kVar respectively. The peak generation fulfills the battery demand and battery supplies additional power during lesser peak periods as presented in Fig. 10d. After fulfilling the battery demand, the rest power is transferred to the AC grid through VSI-1 and VSI-2. Due to the parallel connection and similar rating dc-link capacitors, the proposed FS-MPC operates the inverter in a manner that both inverters evenly distribute the power (4.25 kW–3.5 kW and 0.25 kVar–0.5 kVar) to fulfill the load and grid demand till disturbance occurred as illustrated in Fig. 10e–h respectively. The surplus/rest power is proportionately adjusted by the grid as depicted in Fig. 10 (i).

As VSI-1 failure, the VSI-1 power becomes zero, and the total DC power is transmitted by VSI-2 as illustrated in Fig. 10e–h respectively. Figure 10g,h shows that due to the failure of VSI-1, VSI-2 power increases to 12.5 kW–8.5 kW and 1 kVar–0.5 kVar respectively and grid power is proportionately adjusted. This indicates that the utilization of FS-MPC provides superior synchronization between inverters during the transient conditions, resulting in improved PR operation. To evaluate the PQ of the considered system, the current results of non-linear load, inverters and grid current results are considered as presented in Fig. 11a–k respectively.

The non-linear load current and magnified current results are presented in Fig. 11a,b, which follows the load demand variation. The proposed technique can regulate the non-linearity, by generating the desired harmonic current by the respective VSI-1 and VSI-2 as presented in Fig. 11c–f respectively. Due to the quadrature connection of VSIs improve the grid current quality by offering faster settling and linear results as illustrated in Fig. 11g and the magnified grid current is presented in Fig. 11h. Through FFT analysis the harmonic percentages of load current and grid current are computed as 38.89% and 2.1% respectively. This indicates that the proposed approach significantly reduces the harmonic percentage and improve the PQ.

Comparison for PR justifications

The proposed FS-MPC based HMG power results are compared with the most preferred traditional droop and SRF based FCS-MPC based results to justify better PR operations.

Figure 12a–f presents the comparative power curve results of battery, VSI-1, VSI-2 and grid respectively. The respective power ratings of the involved components are same as discussed in Case-1. Looking at the PR concern, the comparative traditional power results as illustrated in Fig. 12a–f that SRF based FCS-MPC approach takes more settling time, droop approach takes less settling time than SRF based FCS-MPC. However, by using the proposed FS-MPC approach, the developed HMG takes faster settling time within one cycle as compared to both traditional droop and SRF based FCS-MPC approach. The detailed information regarding the settling time is illustrated in Table 2.

Fig. 12

Comparative power results: (a) Battery (b) VSI-1 active (c) VSI-1 reactive (d) VSI-2 active (e) VSI-2 reactive (f) Grid.

Table 2 Power reliability estimation during fault conditions.

Comparison for PQ justifications

This test evaluates PQ by estimating grid current harmonics with a non-linear load. FS-MPC with SAPF is compared to droop control without SAPF and SRF based FCS-MPC with SAPF. It covers power generation from 5 to 10 kW, fluctuating loads from 10 to 5 kW, and a fixed reactive power demand of 1kVar. Results for loads, generation, inverters, and grid power are shown in Fig. 13a–k.

Fig. 13

Comparative current results: (a) Load (b) Magnified of (a), (c) Droop-without SAPF (d) Magnified of (c), (e) FS-MPC with SAPF (f) Magnified of (e), (g) Comparison FS-MPC with SAPF and SRF based FCS-MPC based FCS-MPC-with SAPF (h) Magnified of (g), FFT analysis: (i) Droop-without SAPF, (j) SRF based FCS-MPC-with SAPF (k) FS-MPC with SAPF.

Figure 13a,b show the distorted load current and its magnified view caused by the selected load. Droop-without SAPF, this distortion leads to a non-linear grid current, affecting PQ and grid frequency, as seen in Fig. 13c,d. When the proposed FS-MPC with SAPF is applied, harmonics are reduced, resulting in a more linear grid current, as shown in Fig. 13e,f. Comparing the proposed method to traditional SRF based FCS-MPC results reveals greater linearity, demonstrated in Fig. 13g,h.

In addition to that, the non-linear load and grid currents are analyzed using FFT to assess PQ improvements. Figure 13i shows that droop-without SAPF, both load and grid current THD are 38.89%, exceeding IEEE-519 standards. Applying the SRF based FCS-MPC-with SAPF reduces grid current THD to 6.5%, but load current THD remains at 38.89%, still outside acceptable limits, as shown in Fig. 13j. In contrast, the FS-MPC-based SAPF reduces grid current THD to 2.1%, as shown in Fig. 13k, meeting standards, and highlighting the proposed method’s effectiveness in improving PQ. The analysis confirms that the proposed method significantly improves PQ compared to traditional approaches. The detailed information regarding the harmonic percentage is illustrated in Table 3.

Table 3 Power quality estimation during non-linear load applications.

Statistical analysis of FS-MPC

PR during fault (Table 2)

• Mean recovery time (μ_Recovery) The proposed FS-MPC achieves the lowest mean recovery time (0.58 s) compared to droop (1.45 s) and SRF based FCS-MPC (2.03 s). This indicates that FS-MPC stabilizes the system much faster under fault conditions. The improvement in mean recovery time is 60.00% over droop and 71.43% over SRF based FCS-MPC.

• Standard deviation (SD_Recovery) FS-MPC has the smallest recovery time variability (SD = 0.26 s), showing consistent performance across all fault scenarios. In comparison, droop (SD = 0.36 s) and SRF based FCS-MPC (SD = 0.57 s) exhibit greater variability, indicating less reliability.

• Statistical validation The consistent performance of FS-MPC demonstrates its robustness and reliability during fault conditions, ensuring faster recovery with less deviation.

PQ during non-linear load (Table 3)

• Mean THD (μ_THD) FS-MPC achieves the lowest mean grid THD (μ = 20.50%), significantly outperforming Droop (μ = 38.89%) and SRF (μ = 22.70%). This represents a 94.60% improvement in grid THD over droop and a 67.69% improvement over SRF based FCS-MPC, highlighting FS-MPC’s superior harmonic mitigation capabilities.

• Standard deviation (SD_THD) While FS-MPC has a slightly higher variability in grid THD (SD = 25.88%) compared to SRF based FCS-MPC (SD = 16.91%), its much lower mean THD ensures consistently better power quality.

• Load THD consistency The THD at the load remains constant (38.89%) for all methods, reflecting that the difference in harmonic mitigation is primarily seen at the grid side.

Overall efficacy of FS-MPC

• PR performance FS-MPC demonstrates faster recovery times and more consistent stabilization during faults, ensuring reliable system operation under dynamic conditions.

• PQ performance FS-MPC delivers the lowest grid THD, improving power quality significantly compared to droop and SRF based FCS-MPC methods.

• Statistical validation The statistical metrics (μ and SD) for recovery time and THD highlight the robustness and effectiveness of FS-MPC in maintaining power reliability and quality in hybrid microgrid systems.

Conclusion

The proposed FS-MPC strategy for the three-phase, two-stage PV-battery-based DC-AC HMG system effectively addresses challenges in PQ and PR under dynamic conditions. By integrating a discrete-time HMG model and optimizing selective switching vectors, the approach reduces computational complexity while maintaining robust control performance. The system dynamically balances energy flows among PV generation, battery storage, and the grid, ensuring stable DC-link voltage and efficient battery operations even during faults and load fluctuations. Statistical and experimental validations highlight its superior performance, including a mean recovery time of 0.58 s, which is a 60% improvement over Droop (1.45 s) and a 71.43% improvement over SRF based FCS-MPC (2.03 s). Additionally, the grid current THD was reduced to 2.02%, meeting IEEE-519 standards and marking a 94.6% improvement over Droop and 67.69% over SRF based FCS-MPC. These outcomes underscore the system’s practicality, adaptability, and consistency across diverse operational scenarios.

Building on these strong results, future research could focus on integrating advanced techniques such as reinforcement learning-based predictive control and extended sliding-mode disturbance observers. These innovations would enhance the system’s robustness, scalability, and adaptability, making it suitable for complex configurations and advanced use cases. Such efforts will aim to elevate its performance and versatility, addressing increasingly dynamic and challenging operational environments.