Fig. 17: Examples of inter-chip couplers being implemented to improve co-packaged optics switch package performance.
From: Advances in waveguide to waveguide couplers for 3D integrated photonic packaging
In (a) and (b), flip-chip SiNx to SOI evanescent couplers with Cu μ-pillar bumps for Pbps I/O153 (©2025 Weninger et al., licensed under CC BY 4.0). In (c), IOX to SOI evanescent couplers integrated with solder bumps and TGVs for optical and electrical fan-out (reprinted with permission from ref. 249 ©2023 IEEE). In (d), an organic package substrate contains polymer waveguides connected to SiN waveguides on transceiver PICs using a flip-chip, evanescent coupler (reprinted with permission from ref. 251 ©Optica Publishing Group). In (e), embedded SOI transceivers in an organic substrate with optical fan-out using package level polymer waveguides and GSL patterned curved mirrors for optical coupling382 (©S. Suda et al., licensed under CC BY 4.0). In (f), a CPO design involving photonic and electronic die on different sides of a glass package substrate with optical connectivity using inter-chip couplers (reprinted from ref. 131, with the permission of AIP Publishing)
