Table 6 Summary of III-V intra-chip and inter-chip evanescent couplers in chronological order of publication date

From: Advances in waveguide to waveguide couplers for 3D integrated photonic packaging

Package

Taper design

IL (dB)

Pol.

1-dB Toler. (μm)

1-dB BW (nm)

L × W (μm)

Thru.

Process

Ref.

    

Lateral

Vertical

     

InGaAsP to InPa

Multistage

0.46

/

/

/

/ (1550)

310 × 9

Parallel

Standard

351,352,353

InGaAsP to InPa

Segmented

0.18

TE

/

/

/ (1550)

570 × 3

Parallel

Standard

354,355,356

InGaAsP to InPa

Segmented

0.2

TE/TM

/

/

/ (1550)

40 × 3.4

Parallel

Standard

357

InP to SOIa

Segmented

0.2

/

/

/

/ (1590)

180 × 1.7

Parallel

New

358

AlGaInAs to SOIa

Multistage, resonant

0.02

/

> ± 0.2

>1

> ± 100 (1550)

19 × 3

Parallel

New

359

GaAs to SiNa

Linear

0.47

TE

/

/

400 (900–1300)

20 × 0.6

Parallel

New

289

AlGaInAs to InPa

Segmented, resonant

0.18

TE

< ± 0.5

/

175 (1225–1400)

55 × 2

Parallel

Standard

360

SOI to LiNbO3a

Linear

0.19

/

/

/

/ (1550)

150 × 1

Parallel

New

50

InGaAsP to SiN

Multistage

0.32

/

± 1

/

20 (1560–1580)

384 × 3

Parallel

Custom

162

AlGaInAs to SOI

Nonlinear

0.3

/

± 1.2 ± 0.35°(twist)

/

20 (1550–1570)

225 × 3

Parallel

Custom

361

AlGaInAs to SOIa

Multistage, resonant

0.08

/

/

/

> ± 50 (1550)

5 × 2

Parallel

New

362

AlGaInAs to SOI

Segmented

0.09

/

± 1.1

>0.12

400 (1400–1800)

87 × 3.35

Parallel

Custom

363

  1. The bold values indicate that only simulation results were reported
  2. BW bandwidth, / not reported
  3. aIntra-chip coupling